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Added defparam support to Verilog/AST frontend

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This commit is contained in:
Clifford Wolf 2013-07-04 14:12:33 +02:00
parent 3b294b3912
commit 56432a920f
7 changed files with 79 additions and 13 deletions
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frontends/verilog/lexer.l
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@ -95,6 +95,7 @@ namespace VERILOG_FRONTEND {
"endtask" { return TOK_ENDTASK; }
"parameter" { return TOK_PARAMETER; }
"localparam" { return TOK_LOCALPARAM; }
"defparam" { return TOK_DEFPARAM; }
"assign" { return TOK_ASSIGN; }
"always" { return TOK_ALWAYS; }
"initial" { return TOK_INITIAL; }
@ -184,7 +185,7 @@ supply1 { return TOK_SUPPLY1; }
"$signed" { return TOK_TO_SIGNED; }
"$unsigned" { return TOK_TO_UNSIGNED; }
[a-zA-Z_$][a-zA-Z0-9_\.$]* {
[a-zA-Z_$][a-zA-Z0-9_$]* {
frontend_verilog_yylval.string = new std::string(std::string("\\") + yytext);
return TOK_ID;
}