mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-06-06 14:13:23 +00:00
Code Activity

Added defparam support to Verilog/AST frontend

Browse source
This commit is contained in:
Clifford Wolf 2013-07-04 14:12:33 +02:00
parent 3b294b3912
commit 56432a920f
7 changed files with 79 additions and 13 deletions
Download patch file Download diff file Expand all files Collapse all files

3
frontends/ast/ast.cc
View file

@ -72,6 +72,7 @@ std::string AST::type2str(AstNodeType type)
X(AST_AUTOWIRE)
X(AST_PARAMETER)
X(AST_LOCALPARAM)
X(AST_DEFPARAM)
X(AST_PARASET)
X(AST_ARGUMENT)
X(AST_RANGE)
@ -327,7 +328,7 @@ void AstNode::dumpVlog(FILE *f, std::string indent)
fprintf(f, ");\n");
for (auto child : children)
if (child->type == AST_PARAMETER || child->type == AST_LOCALPARAM)
if (child->type == AST_PARAMETER || child->type == AST_LOCALPARAM || child->type == AST_DEFPARAM)
child->dumpVlog(f, indent + " ");
else
rem_children1.push_back(child);