From 56058b3ed4b1fd6e4d32ec0586dbd1879a06366e Mon Sep 17 00:00:00 2001 From: "Emil J. Tywoniak" Date: Wed, 9 Jul 2025 15:24:34 +0200 Subject: [PATCH] read_verilog, ast: use unified locations in errors and simplify dependencies --- frontends/verilog/.gitignore | 1 - frontends/verilog/Makefile.inc | 6 ++---- frontends/verilog/verilog_error.cc | 14 ++++++-------- frontends/verilog/verilog_error.h | 7 ------- frontends/verilog/verilog_frontend.cc | 2 +- frontends/verilog/verilog_lexer.h | 5 +++++ frontends/verilog/verilog_parser.y | 4 ++-- 7 files changed, 16 insertions(+), 23 deletions(-) diff --git a/frontends/verilog/.gitignore b/frontends/verilog/.gitignore index cb6775cbc..aadbcdcdd 100644 --- a/frontends/verilog/.gitignore +++ b/frontends/verilog/.gitignore @@ -2,4 +2,3 @@ verilog_lexer.cc verilog_parser.output verilog_parser.tab.cc verilog_parser.tab.hh -stack.hh diff --git a/frontends/verilog/Makefile.inc b/frontends/verilog/Makefile.inc index 838ee8c58..67e8074bf 100644 --- a/frontends/verilog/Makefile.inc +++ b/frontends/verilog/Makefile.inc @@ -3,18 +3,16 @@ GENFILES += frontends/verilog/verilog_parser.tab.cc GENFILES += frontends/verilog/verilog_parser.tab.hh GENFILES += frontends/verilog/verilog_parser.output GENFILES += frontends/verilog/verilog_lexer.cc -GENFILES += frontends/verilog/stack.hh -frontends/verilog/verilog_parser.tab.cc: frontends/verilog/verilog_parser.y frontends/verilog/verilog_location.h +frontends/verilog/verilog_parser.tab.cc: frontends/verilog/verilog_parser.y $(Q) mkdir -p $(dir $@) $(P) $(BISON) -Wall -Werror -o $@ -d -r all -b frontends/verilog/verilog_parser $< frontends/verilog/verilog_parser.tab.hh: frontends/verilog/verilog_parser.tab.cc -frontends/verilog/verilog_frontend.h: frontends/verilog/verilog_parser.tab.hh -frontends/verilog/verilog_error.h: frontends/verilog/verilog_parser.tab.hh frontends/verilog/preproc.o: frontends/verilog/verilog_parser.tab.hh +frontends/verilog/verilog_lexer.h: frontends/verilog/verilog_parser.tab.hh frontends/verilog/verilog_lexer.cc: frontends/verilog/verilog_lexer.l frontends/verilog/verilog_parser.tab.cc $(Q) mkdir -p $(dir $@) $(P) flex -o frontends/verilog/verilog_lexer.cc $< diff --git a/frontends/verilog/verilog_error.cc b/frontends/verilog/verilog_error.cc index 410a13580..4adfaafa6 100644 --- a/frontends/verilog/verilog_error.cc +++ b/frontends/verilog/verilog_error.cc @@ -25,6 +25,12 @@ USING_YOSYS_NAMESPACE +/** + * Legacy behavior is to only track lines. Now we have columns too, but we don't + * report them in errors. + * TODO: report columns, too + */ + [[noreturn]] static void verr_at(std::string filename, int begin_line, char const *fmt, va_list ap) { @@ -36,14 +42,6 @@ static void verr_at(std::string filename, int begin_line, char const *fmt, va_li exit(1); } -void VERILOG_FRONTEND::err_at_ast(AST::AstSrcLocType loc, char const *fmt, ...) -{ - va_list args; - va_start(args, fmt); - verr_at(*loc.begin.filename, loc.begin.line, fmt, args); - va_end(args); -} - [[noreturn]] void VERILOG_FRONTEND::err_at_loc(location loc, char const *fmt, ...) { diff --git a/frontends/verilog/verilog_error.h b/frontends/verilog/verilog_error.h index 4cb65164b..2eeb4538e 100644 --- a/frontends/verilog/verilog_error.h +++ b/frontends/verilog/verilog_error.h @@ -5,17 +5,10 @@ #include "frontends/ast/ast.h" #include "frontends/verilog/verilog_location.h" -#if ! defined(yyFlexLexerOnce) -#define yyFlexLexer frontend_verilog_yyFlexLexer -#include -#endif - YOSYS_NAMESPACE_BEGIN namespace VERILOG_FRONTEND { - [[noreturn]] - void err_at_ast(AST::AstSrcLocType loc, char const *fmt, ...); [[noreturn]] void err_at_loc(location loc, char const *fmt, ...); }; diff --git a/frontends/verilog/verilog_frontend.cc b/frontends/verilog/verilog_frontend.cc index 733ec8ba7..e7d34dac5 100644 --- a/frontends/verilog/verilog_frontend.cc +++ b/frontends/verilog/verilog_frontend.cc @@ -51,7 +51,7 @@ static std::list> verilog_defaults_stack; static void error_on_dpi_function(AST::AstNode *node) { if (node->type == AST::AST_DPI_FUNCTION) - err_at_ast(node->location, "Found DPI function %s.\n", node->str.c_str()); + err_at_loc(node->location, "Found DPI function %s.\n", node->str.c_str()); for (auto& child : node->children) error_on_dpi_function(child.get()); } diff --git a/frontends/verilog/verilog_lexer.h b/frontends/verilog/verilog_lexer.h index b7885181c..fe56b27d2 100644 --- a/frontends/verilog/verilog_lexer.h +++ b/frontends/verilog/verilog_lexer.h @@ -7,6 +7,11 @@ #include #include +#if ! defined(yyFlexLexerOnce) +#define yyFlexLexer frontend_verilog_yyFlexLexer +#include +#endif + YOSYS_NAMESPACE_BEGIN namespace VERILOG_FRONTEND { diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y index 728c7f6d5..0d068d2ed 100644 --- a/frontends/verilog/verilog_parser.y +++ b/frontends/verilog/verilog_parser.y @@ -200,7 +200,7 @@ if (type_node->range_left >= 0 && type_node->range_right >= 0) { // type already restricts the range if (range_node) { - err_at_ast(type_node->location, "integer/genvar types cannot have packed dimensions."); + err_at_loc(type_node->location, "integer/genvar types cannot have packed dimensions."); } else { range_node = makeRange(type_node->location, type_node->range_left, type_node->range_right, false); @@ -217,7 +217,7 @@ } } if (!valid) - err_at_ast(type_node->location, "wire/reg/logic packed dimension must be of the form [:]"); + err_at_loc(type_node->location, "wire/reg/logic packed dimension must be of the form [:]"); } return range_node;