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verilog_backend: dump attributes on CaseRule, as comments.
Attributes are not permitted in that position by Verilog grammar.
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@ -364,20 +364,22 @@ void dump_sigspec(std::ostream &f, const RTLIL::SigSpec &sig)
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}
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}
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}
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}
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void dump_attributes(std::ostream &f, std::string indent, dict<RTLIL::IdString, RTLIL::Const> &attributes, char term = '\n', bool modattr = false)
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void dump_attributes(std::ostream &f, std::string indent, dict<RTLIL::IdString, RTLIL::Const> &attributes, char term = '\n', bool modattr = false, bool as_comment = false)
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{
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{
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if (noattr)
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if (noattr)
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return;
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return;
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if (attr2comment)
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as_comment = true;
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for (auto it = attributes.begin(); it != attributes.end(); ++it) {
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for (auto it = attributes.begin(); it != attributes.end(); ++it) {
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f << stringf("%s" "%s %s", indent.c_str(), attr2comment ? "/*" : "(*", id(it->first).c_str());
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f << stringf("%s" "%s %s", indent.c_str(), as_comment ? "/*" : "(*", id(it->first).c_str());
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f << stringf(" = ");
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f << stringf(" = ");
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if (modattr && (it->second == Const(0, 1) || it->second == Const(0)))
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if (modattr && (it->second == Const(0, 1) || it->second == Const(0)))
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f << stringf(" 0 ");
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f << stringf(" 0 ");
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else if (modattr && (it->second == Const(1, 1) || it->second == Const(1)))
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else if (modattr && (it->second == Const(1, 1) || it->second == Const(1)))
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f << stringf(" 1 ");
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f << stringf(" 1 ");
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else
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else
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dump_const(f, it->second, -1, 0, false, attr2comment);
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dump_const(f, it->second, -1, 0, false, as_comment);
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f << stringf(" %s%c", attr2comment ? "*/" : "*)", term);
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f << stringf(" %s%c", as_comment ? "*/" : "*)", term);
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}
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}
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}
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}
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@ -1511,7 +1513,9 @@ void dump_proc_switch(std::ostream &f, std::string indent, RTLIL::SwitchRule *sw
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dump_sigspec(f, (*it)->compare[i]);
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dump_sigspec(f, (*it)->compare[i]);
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}
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}
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}
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}
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f << stringf(":\n");
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f << stringf(":");
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dump_attributes(f, indent, (*it)->attributes, ' ', /*modattr=*/false, /*as_comment=*/true);
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f << stringf("\n");
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dump_case_body(f, indent + " ", *it);
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dump_case_body(f, indent + " ", *it);
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}
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}
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@ -1662,7 +1666,7 @@ void dump_module(std::ostream &f, std::string indent, RTLIL::Module *module)
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}
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}
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}
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}
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dump_attributes(f, indent, module->attributes, '\n', true);
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dump_attributes(f, indent, module->attributes, '\n', /*attr2comment=*/true);
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f << stringf("%s" "module %s(", indent.c_str(), id(module->name, false).c_str());
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f << stringf("%s" "module %s(", indent.c_str(), id(module->name, false).c_str());
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bool keep_running = true;
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bool keep_running = true;
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for (int port_id = 1; keep_running; port_id++) {
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for (int port_id = 1; keep_running; port_id++) {
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