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opt_clean, simplemap: Add $buf
handling
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parent
55595b6c8d
commit
557047fe1e
4 changed files with 24 additions and 2 deletions
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@ -601,7 +601,7 @@ void rmunused_module(RTLIL::Module *module, bool purge_mode, bool verbose, bool
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std::vector<RTLIL::Cell*> delcells;
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for (auto cell : module->cells())
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if (cell->type.in(ID($pos), ID($_BUF_)) && !cell->has_keep_attr()) {
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if (cell->type.in(ID($pos), ID($_BUF_), ID($buf)) && !cell->has_keep_attr()) {
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bool is_signed = cell->type == ID($pos) && cell->getParam(ID::A_SIGNED).as_bool();
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RTLIL::SigSpec a = cell->getPort(ID::A);
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RTLIL::SigSpec y = cell->getPort(ID::Y);
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@ -42,6 +42,14 @@ void simplemap_not(RTLIL::Module *module, RTLIL::Cell *cell)
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}
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}
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void simplemap_buf(RTLIL::Module *module, RTLIL::Cell *cell)
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{
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RTLIL::SigSpec sig_a = cell->getPort(ID::A);
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RTLIL::SigSpec sig_y = cell->getPort(ID::Y);
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module->connect(RTLIL::SigSig(sig_y, sig_a));
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}
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void simplemap_pos(RTLIL::Module *module, RTLIL::Cell *cell)
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{
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RTLIL::SigSpec sig_a = cell->getPort(ID::A);
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@ -411,6 +419,7 @@ void simplemap_get_mappers(dict<IdString, void(*)(RTLIL::Module*, RTLIL::Cell*)>
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{
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mappers[ID($not)] = simplemap_not;
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mappers[ID($pos)] = simplemap_pos;
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mappers[ID($buf)] = simplemap_buf;
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mappers[ID($and)] = simplemap_bitop;
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mappers[ID($or)] = simplemap_bitop;
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mappers[ID($xor)] = simplemap_bitop;
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