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	More testing
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					 2 changed files with 5 additions and 2 deletions
				
			
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			@ -24,5 +24,7 @@ module test2 (
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		`define T_rise 1
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		`define T_fall 2
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		(A => Q) = (`T_rise,`T_fall);
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		//(B => Q) = (`T_rise+`T_fall)/2.0;
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		(B => Q) = 1.5;
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	endspecify
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endmodule
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			@ -5,7 +5,7 @@ select t:$specify2 -assert-count 0
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select t:$specify3 -assert-count 1
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select t:$specrule -assert-count 2
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cd test2
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select t:$specify2 -assert-count 1
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select t:$specify2 -assert-count 2
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select t:$specify3 -assert-count 0
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select t:$specrule -assert-count 0
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write_verilog specify.out
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			@ -17,9 +17,10 @@ select t:$specify2 -assert-count 0
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select t:$specify3 -assert-count 1
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select t:$specrule -assert-count 2
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cd test2
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select t:$specify2 -assert-count 1
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select t:$specify2 -assert-count 2
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select t:$specify3 -assert-count 0
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select t:$specrule -assert-count 0
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design -stash gate
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# TODO: How to check $specify and $specrule-s are equivalent?
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#       Otherwise, need more select statements to check parameter values are as expected?
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