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Added module->remove(), module->addWire(), module->addCell(), cell->check()

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This commit is contained in:
Clifford Wolf 2014-07-21 12:02:55 +02:00
parent caae6e19df
commit 54b0f2e659
2 changed files with 44 additions and 8 deletions
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5
kernel/rtlil.h
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@ -290,12 +290,16 @@ struct RTLIL::Module {
RTLIL::Wire *new_wire(int width, RTLIL::IdString name);
void add(RTLIL::Wire *wire);
void add(RTLIL::Cell *cell);
void remove(RTLIL::Cell *cell);
void fixup_ports();
template<typename T> void rewrite_sigspecs(T functor);
void cloneInto(RTLIL::Module *new_mod) const;
virtual RTLIL::Module *clone() const;
RTLIL::Wire *addWire(RTLIL::IdString name, int width = 1);
RTLIL::Cell *addCell(RTLIL::IdString name, RTLIL::IdString type);
// The add* methods create a cell and return the created cell. All signals must exist in advance.
RTLIL::Cell* addNot (RTLIL::IdString name, RTLIL::SigSpec sig_a, RTLIL::SigSpec sig_y, bool is_signed = false);
@ -449,6 +453,7 @@ struct RTLIL::Cell {
std::map<RTLIL::IdString, RTLIL::Const> parameters;
RTLIL_ATTRIBUTE_MEMBERS
void optimize();
void check();
template<typename T> void rewrite_sigspecs(T functor);
};