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Merge pull request #5143 from YosysHQ/krys/typedef_struct_global

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SystemVerilog: Fix typedef struct in global space
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KrystalDelusion 2025-05-31 09:59:26 +12:00 • committed by GitHub
commit 545753cc5a
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3 changed files with 15 additions and 1 deletions
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1
frontends/ast/simplify.cc
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@ -1433,6 +1433,7 @@ bool AstNode::simplify(bool const_fold, int stage, int width_hint, bool sign_hin
current_ast_mod->children.push_back(wnode);
}
basic_prep = true;
is_custom_type = false;
}
break;

2
frontends/verilog/verilog_parser.y
View file

@ -1855,7 +1855,7 @@ struct_decl:
}
;
struct_type: struct_union { astbuf2 = $1; } struct_body { $$ = astbuf2; }
struct_type: struct_union { astbuf2 = $1; astbuf2->is_custom_type = true; } struct_body { $$ = astbuf2; }
;
struct_union:

13
tests/svtypes/typedef_struct_global.ys Normal file
View file

@ -0,0 +1,13 @@
read_verilog -sv << EOF
typedef struct packed {
logic y;
logic x;
} Vec_2_B;
module top;
Vec_2_B two_dee;
wire foo = two_dee.x;
endmodule
EOF