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Merge pull request #5143 from YosysHQ/krys/typedef_struct_global
SystemVerilog: Fix typedef struct in global space
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commit
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3 changed files with 15 additions and 1 deletions
13
tests/svtypes/typedef_struct_global.ys
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13
tests/svtypes/typedef_struct_global.ys
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read_verilog -sv << EOF
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typedef struct packed {
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logic y;
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logic x;
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} Vec_2_B;
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module top;
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Vec_2_B two_dee;
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wire foo = two_dee.x;
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endmodule
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EOF
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