mirror of
https://github.com/YosysHQ/yosys
synced 2025-04-23 17:15:33 +00:00
Display simulation time data
This commit is contained in:
parent
a6959d30df
commit
543feb75cb
3 changed files with 27 additions and 2 deletions
|
@ -1033,7 +1033,9 @@ struct SimWorker : SimShared
|
|||
log_error("No clock edges found in given time range\n");
|
||||
fst->reconstructAllAtTimes(edges);
|
||||
bool initial = false;
|
||||
int cycle = 0;
|
||||
for(auto &time : edges) {
|
||||
log("Simulating cycle %d [%zu %s].\n", cycle+1, time, fst->getTimescaleString());
|
||||
for(auto &item : inputs) {
|
||||
std::string v = fst->valueAt(item.second, time);
|
||||
top->set_state(item.first, Const::from_string(v));
|
||||
|
@ -1046,7 +1048,8 @@ struct SimWorker : SimShared
|
|||
|
||||
bool status = top->checkSignals(time);
|
||||
if (status)
|
||||
log_error("Signal difference at %zu\n", time);
|
||||
log_error("Signal difference\n");
|
||||
cycle++;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue