From 54380b0a1a58cc7f6a6440e60af14c6e10fdfd0a Mon Sep 17 00:00:00 2001
From: nella <simontupy64@gmail.com>
Date: Wed, 5 Aug 2026 09:45:10 +0200
Subject: [PATCH] Add test.

---
 tests/various/tribuf_nested.ys | 43 ++++++++++++++++++++++++++++++++++
 1 file changed, 43 insertions(+)
 create mode 100644 tests/various/tribuf_nested.ys

diff --git a/tests/various/tribuf_nested.ys b/tests/various/tribuf_nested.ys
new file mode 100644
index 000000000..b1932bc7f
--- /dev/null
+++ b/tests/various/tribuf_nested.ys
@@ -0,0 +1,43 @@
+# tristate hidden behind an ordinary mux must still be inferred as a tribuf
+read_verilog <<EOT
+module nested(A, COND, DATA, BI);
+inout BI;
+input A, COND, DATA;
+assign BI = COND ? 1'b0 : (A ? 1'bz : DATA);
+endmodule
+EOT
+hierarchy -top nested
+proc
+
+tribuf -logic
+cd nested
+select -assert-count 1 t:$tribuf
+
+design -reset
+read_verilog <<EOT
+module flat(A, COND, DATA, BI);
+inout BI;
+input A, COND, DATA;
+assign BI = !COND && A ? 1'bz : (COND ? 1'b0 : DATA);
+endmodule
+EOT
+hierarchy -top flat
+proc
+tribuf -logic
+cd flat
+select -assert-count 1 t:$tribuf
+
+design -reset
+read_verilog <<EOT
+module valnest(s, a, b, BI);
+inout BI;
+input s, a, b;
+assign BI = s ? a : 1'bz;
+assign BI = s ? 1'bz : (b ? 1'bz : a);
+endmodule
+EOT
+hierarchy -top valnest
+proc
+tribuf -logic
+cd valnest
+select -assert-count 1 t:$tribuf