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ffAmuxAB -> ffAenpol

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This commit is contained in:
Eddie Hung 2019-09-05 21:28:28 -07:00
parent 5a2fc6fcb5
commit 53ca536d67
2 changed files with 9 additions and 6 deletions
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10
passes/pmgen/xilinx_dsp.pmg
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@ -2,7 +2,8 @@ pattern xilinx_dsp
state <SigBit> clock
state <SigSpec> sigA sigffAmux sigB sigffBmux sigC sigM sigP
state <IdString> ffAmuxAB ffBmuxAB ffMmuxAB ffPmuxAB postAddAB postAddMuxAB
state <IdString> ffBmuxAB ffMmuxAB ffPmuxAB postAddAB postAddMuxAB
state <bool> ffAenpol
match dsp
select dsp->type.in(\DSP48E1)
@ -69,9 +70,10 @@ match ffAmux
filter GetSize(port(ffAmux, \Y)) >= GetSize(sigA)
slice offset GetSize(port(ffAmux, \Y))
filter offset+GetSize(sigA) <= GetSize(port(ffAmux, \Y)) && port(ffAmux, \Y).extract(offset, GetSize(sigA)) == sigA
choice <IdString> AB {\A, \B}
filter offset+GetSize(sigffAmux) <= GetSize(port(ffAmux, \Y)) && port(ffAmux, AB).extract(offset, GetSize(sigffAmux)) == sigffAmux
set ffAmuxAB AB
choice <IdString> BA {\B, \A}
filter offset+GetSize(sigffAmux) <= GetSize(port(ffAmux, \Y)) && port(ffAmux, BA).extract(offset, GetSize(sigffAmux)) == sigffAmux
define <bool> pol (BA == \B)
set ffAenpol pol
semioptional
endmatch