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Prepare for situation when port of the signal cannot be found

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This commit is contained in:
Bogdan Vukobratovic 2019-06-14 11:39:24 +02:00
parent 291b36afeb
commit 53695e6729
2 changed files with 8 additions and 2 deletions
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8
kernel/algo.h
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@ -58,10 +58,14 @@ struct Netlist {
return sigbit_driver_map.at(sig);
}
RTLIL::SigBit& driver_port(RTLIL::SigBit sig)
RTLIL::SigSpec driver_port(RTLIL::SigBit sig)
{
RTLIL::Cell *cell = driver_cell(sig);
if (!cell) {
return RTLIL::SigSpec();
}
for (auto &port : cell->connections_) {
if (ct.cell_output(cell->type, port.first)) {
RTLIL::SigSpec port_sig = sigmap(port.second);
@ -72,6 +76,8 @@ struct Netlist {
}
}
}
return RTLIL::SigSpec();
}
void setup_netlist(RTLIL::Module *module, const CellTypes &ct)

2
passes/opt/opt_rmdff.cc
View file

@ -503,7 +503,7 @@ bool handle_dff(RTLIL::Module *mod, RTLIL::Cell *dff)
// If the register bit cannot change, we can replace it with a constant
if (!counter_example_found) {
RTLIL::SigBit &driver_port = net.driver_port(q_sigbit);
RTLIL::SigSpec driver_port = net.driver_port(q_sigbit);
RTLIL::Wire *dummy_wire = mod->addWire(NEW_ID, 1);
for (auto &conn : mod->connections_)