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Added more generic _TECHMAP_ wire mechanism to techmap pass

This commit is contained in:
Clifford Wolf 2013-11-23 15:58:06 +01:00
parent 9ab850e45e
commit 532091afcb
3 changed files with 193 additions and 79 deletions

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@ -204,6 +204,12 @@ struct RTLIL::Selection {
bool selected_whole_module(RTLIL::IdString mod_name) const;
bool selected_member(RTLIL::IdString mod_name, RTLIL::IdString memb_name) const;
void optimize(RTLIL::Design *design);
template<typename T1> void select(T1 *module) {
if (!full_selection && selected_modules.count(module->name) == 0) {
selected_modules.insert(module->name);
selected_members.erase(module->name);
}
}
template<typename T1, typename T2> void select(T1 *module, T2 *member) {
if (!full_selection && selected_modules.count(module->name) == 0)
selected_members[module->name].insert(member->name);