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Fixed bug in verilog parser

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This commit is contained in:
Clifford Wolf 2015-10-15 15:19:23 +02:00
parent 302166dd59
commit 5308c1e02a
1 changed files with 1 additions and 1 deletions
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2
frontends/verilog/verilog_parser.y
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@ -759,7 +759,7 @@ assign_expr_list:
assign_expr | assign_expr_list ',' assign_expr;
assign_expr:
expr '=' expr {
lvalue '=' expr {
ast_stack.back()->children.push_back(new AstNode(AST_ASSIGN, $1, $3));
};