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Respect \keep on cells or wires

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This commit is contained in:
Eddie Hung 2019-08-21 13:42:03 -07:00
parent b808123e71
commit 52fea5b658
1 changed files with 10 additions and 2 deletions
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12
passes/pmgen/xilinx_srl.pmg
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@ -10,6 +10,8 @@ endcode
match first match first
select first->type.in($_DFF_N_, $_DFF_P_, $_DFFE_NN_, $_DFFE_NP_, $_DFFE_PN_, $_DFFE_PP_, \FDRE, \FDRE_1) select first->type.in($_DFF_N_, $_DFF_P_, $_DFFE_NN_, $_DFFE_NP_, $_DFFE_PN_, $_DFFE_PP_, \FDRE, \FDRE_1)
select !first->get_bool_attribute(\keep)
select !port(first, \Q).as_wire()->get_bool_attribute(\keep)
filter !non_first_cells.count(first) filter !non_first_cells.count(first)
//generate //generate
// SigSpec A = module->addWire(NEW_ID); // SigSpec A = module->addWire(NEW_ID);
@ -46,11 +48,15 @@ subpattern setup
match first match first
select first->type.in($_DFF_N_, $_DFF_P_, $_DFFE_NN_, $_DFFE_NP_, $_DFFE_PN_, $_DFFE_PP_, \FDRE, \FDRE_1) select first->type.in($_DFF_N_, $_DFF_P_, $_DFFE_NN_, $_DFFE_NP_, $_DFFE_PN_, $_DFFE_PP_, \FDRE, \FDRE_1)
select !first->get_bool_attribute(\keep)
select !port(first, \Q).as_wire()->get_bool_attribute(\keep)
endmatch endmatch
match next match next
select nusers(port(next, \Q)) == 2
select next->type.in($_DFF_N_, $_DFF_P_, $_DFFE_NN_, $_DFFE_NP_, $_DFFE_PN_, $_DFFE_PP_, \FDRE, \FDRE_1) select next->type.in($_DFF_N_, $_DFF_P_, $_DFFE_NN_, $_DFFE_NP_, $_DFFE_PN_, $_DFFE_PP_, \FDRE, \FDRE_1)
select !next->get_bool_attribute(\keep)
select !port(next, \Q).as_wire()->get_bool_attribute(\keep)
select nusers(port(next, \Q)) == 2
index <IdString> next->type === first->type index <IdString> next->type === first->type
index <SigSpec> port(next, \Q) === port(first, \D) index <SigSpec> port(next, \Q) === port(first, \D)
endmatch endmatch
@ -66,8 +72,10 @@ arg first
match next match next
semioptional semioptional
select nusers(port(next, \Q)) == 2
select next->type.in($_DFF_N_, $_DFF_P_, $_DFFE_NN_, $_DFFE_NP_, $_DFFE_PN_, $_DFFE_PP_, \FDRE, \FDRE_1) select next->type.in($_DFF_N_, $_DFF_P_, $_DFFE_NN_, $_DFFE_NP_, $_DFFE_PN_, $_DFFE_PP_, \FDRE, \FDRE_1)
select !next->get_bool_attribute(\keep)
select !port(next, \Q).as_wire()->get_bool_attribute(\keep)
select nusers(port(next, \Q)) == 2
index <IdString> next->type === chain.back()->type index <IdString> next->type === chain.back()->type
index <SigSpec> port(next, \Q) === port(chain.back(), \D) index <SigSpec> port(next, \Q) === port(chain.back(), \D)
//generate 10 //generate 10