mirror of
https://github.com/YosysHQ/yosys
synced 2025-04-13 04:28:18 +00:00
verilog: Support tri/triand/trior wire types.
These are, by the standard, just aliases for wire/wand/wor. Fixes #2918.
This commit is contained in:
parent
2e421feb0e
commit
52cbf1bea5
|
@ -277,8 +277,11 @@ static bool isUserType(std::string &s)
|
||||||
"output" { return TOK_OUTPUT; }
|
"output" { return TOK_OUTPUT; }
|
||||||
"inout" { return TOK_INOUT; }
|
"inout" { return TOK_INOUT; }
|
||||||
"wire" { return TOK_WIRE; }
|
"wire" { return TOK_WIRE; }
|
||||||
|
"tri" { return TOK_WIRE; }
|
||||||
"wor" { return TOK_WOR; }
|
"wor" { return TOK_WOR; }
|
||||||
|
"trior" { return TOK_WOR; }
|
||||||
"wand" { return TOK_WAND; }
|
"wand" { return TOK_WAND; }
|
||||||
|
"triand" { return TOK_WAND; }
|
||||||
"reg" { return TOK_REG; }
|
"reg" { return TOK_REG; }
|
||||||
"integer" { return TOK_INTEGER; }
|
"integer" { return TOK_INTEGER; }
|
||||||
"signed" { return TOK_SIGNED; }
|
"signed" { return TOK_SIGNED; }
|
||||||
|
|
Loading…
Reference in a new issue