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Added support for truncating of wires to wreduce pass
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parent
d3b1a29708
commit
523df73145
4 changed files with 93 additions and 12 deletions
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@ -590,6 +590,10 @@ public:
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std::vector<RTLIL::Wire*> selected_wires() const;
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std::vector<RTLIL::Cell*> selected_cells() const;
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template<typename T> bool selected(T *member) const {
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return design->selected_member(name, member->name);
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}
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RTLIL::Wire* wire(RTLIL::IdString id) { return wires_.count(id) ? wires_.at(id) : nullptr; }
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RTLIL::Cell* cell(RTLIL::IdString id) { return cells_.count(id) ? cells_.at(id) : nullptr; }
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@ -604,6 +608,9 @@ public:
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void rename(RTLIL::Cell *cell, RTLIL::IdString new_name);
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void rename(RTLIL::IdString old_name, RTLIL::IdString new_name);
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void swap_names(RTLIL::Wire *w1, RTLIL::Wire *w2);
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void swap_names(RTLIL::Cell *c1, RTLIL::Cell *c2);
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RTLIL::Wire *addWire(RTLIL::IdString name, int width = 1);
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RTLIL::Wire *addWire(RTLIL::IdString name, const RTLIL::Wire *other);
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