From 51331a3ffdbb228b69618c96529836f41c3b0f1a Mon Sep 17 00:00:00 2001 From: "Emil J. Tywoniak" Date: Fri, 13 Mar 2026 12:18:48 +0100 Subject: [PATCH] opt_expr: fix invert_map --- passes/opt/opt_expr.cc | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/passes/opt/opt_expr.cc b/passes/opt/opt_expr.cc index 427cc7660..28746ae93 100644 --- a/passes/opt/opt_expr.cc +++ b/passes/opt/opt_expr.cc @@ -400,7 +400,8 @@ void replace_const_cells(RTLIL::Design *design, RTLIL::Module *module, bool cons auto dirty_cells = module->dirty_cells(timestamp); - for (auto cell : dirty_cells) { + // TODO this could be cheaper + for (auto cell : module->cells()) { if (design->selected(module, cell) && cell->type[0] == '$') { if (cell->type.in(ID($_NOT_), ID($not), ID($logic_not)) && GetSize(cell->getPort(ID::A)) == 1 && GetSize(cell->getPort(ID::Y)) == 1)