mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-08-15 15:25:28 +00:00
Code Activity

Renamed some of the test cases in tests/simple to avoid name collisions

Browse source
This commit is contained in:
Clifford Wolf 2014-07-25 13:01:45 +02:00
parent 0520bfea89
commit 50f22ff30c
15 changed files with 30 additions and 30 deletions
Download patch file Download diff file Expand all files Collapse all files

6
tests/simple/generate.v
View file

@ -1,5 +1,5 @@
module test1(clk, a, b, y);
module gen_test1(clk, a, b, y);
input clk;
input [7:0] a, b;
@ -40,7 +40,7 @@ endmodule
// ------------------------------------------
module test2(clk, a, b, y);
module gen_test2(clk, a, b, y);
input clk;
input [7:0] a, b;
@ -67,7 +67,7 @@ endmodule
// ------------------------------------------
module test3(a, b, sel, y, z);
module gen_test3(a, b, sel, y, z);
input [3:0] a, b;
input sel;