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Revert "Fix xilinx tests, when iopads are default"

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This reverts commit 477e43d921.
This commit is contained in:
Miodrag Milanovic 2019-12-28 16:12:45 +01:00
parent 436fea9e69
commit 509da7ed1a
16 changed files with 40 additions and 40 deletions
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14
tests/arch/xilinx/lutram.ys
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@ -14,7 +14,7 @@
#select -assert-count 1 t:BUFG
#select -assert-count 8 t:FDRE
#select -assert-count 8 t:RAM16X1D
#select -assert-none t:BUFG t:FDRE t:RAM16X1D t:IBUF t:OBUF %% t:* %D
#select -assert-none t:BUFG t:FDRE t:RAM16X1D %% t:* %D
design -reset
@ -34,7 +34,7 @@ cd lutram_1w1r
select -assert-count 1 t:BUFG
select -assert-count 8 t:FDRE
select -assert-count 8 t:RAM32X1D
select -assert-none t:BUFG t:FDRE t:RAM32X1D t:IBUF t:OBUF %% t:* %D
select -assert-none t:BUFG t:FDRE t:RAM32X1D %% t:* %D
design -reset
@ -54,7 +54,7 @@ cd lutram_1w1r
select -assert-count 1 t:BUFG
select -assert-count 8 t:FDRE
select -assert-count 8 t:RAM64X1D
select -assert-none t:BUFG t:FDRE t:RAM64X1D t:IBUF t:OBUF %% t:* %D
select -assert-none t:BUFG t:FDRE t:RAM64X1D %% t:* %D
design -reset
@ -74,7 +74,7 @@ cd lutram_1w3r
select -assert-count 1 t:BUFG
select -assert-count 24 t:FDRE
select -assert-count 4 t:RAM32M
select -assert-none t:BUFG t:FDRE t:RAM32M t:IBUF t:OBUF %% t:* %D
select -assert-none t:BUFG t:FDRE t:RAM32M %% t:* %D
design -reset
@ -94,7 +94,7 @@ cd lutram_1w3r
select -assert-count 1 t:BUFG
select -assert-count 24 t:FDRE
select -assert-count 8 t:RAM64M
select -assert-none t:BUFG t:FDRE t:RAM64M t:IBUF t:OBUF %% t:* %D
select -assert-none t:BUFG t:FDRE t:RAM64M %% t:* %D
design -reset
@ -114,7 +114,7 @@ cd lutram_1w1r
select -assert-count 1 t:BUFG
select -assert-count 6 t:FDRE
select -assert-count 1 t:RAM32M
select -assert-none t:BUFG t:FDRE t:RAM32M t:IBUF t:OBUF %% t:* %D
select -assert-none t:BUFG t:FDRE t:RAM32M %% t:* %D
design -reset
@ -134,4 +134,4 @@ cd lutram_1w1r
select -assert-count 1 t:BUFG
select -assert-count 6 t:FDRE
select -assert-count 2 t:RAM64M
select -assert-none t:BUFG t:FDRE t:RAM64M t:IBUF t:OBUF %% t:* %D
select -assert-none t:BUFG t:FDRE t:RAM64M %% t:* %D