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Added support for local regs in named blocks

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This commit is contained in:
Clifford Wolf 2013-12-04 09:10:16 +01:00
parent b5afd75b0a
commit 507c63d112
3 changed files with 30 additions and 2 deletions
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7
frontends/verilog/parser.y
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@ -407,7 +407,6 @@ opt_signed:
};
task_func_body:
task_func_body wire_decl |
task_func_body behavioral_stmt |
/* empty */;
@ -761,7 +760,7 @@ simple_behavioral_stmt:
// this production creates the obligatory if-else shift/reduce conflict
behavioral_stmt:
defattr |
defattr | wire_decl |
simple_behavioral_stmt ';' |
hierarchical_id attr {
AstNode *node = new AstNode(AST_TCALL);
@ -778,7 +777,11 @@ behavioral_stmt:
ast_stack.back()->children.push_back(node);
ast_stack.push_back(node);
append_attr(node, $1);
if ($3 != NULL)
node->str = *$3;
} behavioral_stmt_list TOK_END opt_label {
if ($3 != NULL && $7 != NULL && *$3 != *$7)
frontend_verilog_yyerror("Syntax error.");
if ($3 != NULL)
delete $3;
if ($7 != NULL)