mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-11-04 05:19:11 +00:00
Code Activity

ice40/cells_sim.v: Add support for TRIM input to SB_HFOSC

Browse source 
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
This commit is contained in:
Sylvain Munaut 2019-05-13 12:51:06 +02:00
parent 5772732a6d
commit 4f9183d107
1 changed files with 11 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

11
techlibs/ice40/cells_sim.v
View file

@ -930,10 +930,21 @@ endmodule
(* blackbox *) (* blackbox *)
module SB_HFOSC( module SB_HFOSC(
input TRIM0,
input TRIM1,
input TRIM2,
input TRIM3,
input TRIM4,
input TRIM5,
input TRIM6,
input TRIM7,
input TRIM8,
input TRIM9,
input CLKHFPU, input CLKHFPU,
input CLKHFEN, input CLKHFEN,
output CLKHF output CLKHF
); );
parameter TRIM_EN = "0b0";
parameter CLKHF_DIV = "0b00"; parameter CLKHF_DIV = "0b00";
endmodule endmodule