mirror of
https://github.com/YosysHQ/yosys
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Replaced ezDefaultSAT with ezSatPtr
This commit is contained in:
parent
f778a4081c
commit
4e6ca7760f
12 changed files with 186 additions and 139 deletions
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@ -143,16 +143,16 @@ struct VlogHammerReporter
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{
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log("Verifying SAT model (%s)..\n", model_undef ? "with undef" : "without undef");
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ezDefaultSAT ez;
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ezSatPtr ez;
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SigMap sigmap(module);
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SatGen satgen(&ez, &sigmap);
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SatGen satgen(ez.get(), &sigmap);
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satgen.model_undef = model_undef;
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for (auto &c : module->cells_)
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if (!satgen.importCell(c.second))
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log_error("Failed to import cell %s (type %s) to SAT database.\n", RTLIL::id2cstr(c.first), RTLIL::id2cstr(c.second->type));
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ez.assume(satgen.signals_eq(recorded_set_vars, recorded_set_vals));
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ez->assume(satgen.signals_eq(recorded_set_vars, recorded_set_vals));
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std::vector<int> y_vec = satgen.importDefSigSpec(module->wires_.at("\\y"));
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std::vector<bool> y_values;
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@ -163,9 +163,9 @@ struct VlogHammerReporter
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}
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log(" Created SAT problem with %d variables and %d clauses.\n",
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ez.numCnfVariables(), ez.numCnfClauses());
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ez->numCnfVariables(), ez->numCnfClauses());
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if (!ez.solve(y_vec, y_values))
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if (!ez->solve(y_vec, y_values))
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log_error("Failed to find solution to SAT problem.\n");
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for (int i = 0; i < expected_y.size(); i++) {
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@ -204,7 +204,7 @@ struct VlogHammerReporter
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if (y_undef.at(i))
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{
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log(" Toggling undef bit %d to test undef gating.\n", i);
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if (!ez.solve(y_vec, y_values, ez.IFF(y_vec.at(i), y_values.at(i) ? ez.CONST_FALSE : ez.CONST_TRUE)))
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if (!ez->solve(y_vec, y_values, ez->IFF(y_vec.at(i), y_values.at(i) ? ez->CONST_FALSE : ez->CONST_TRUE)))
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log_error("Failed to find solution with toggled bit!\n");
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cmp_vars.push_back(y_vec.at(expected_y.size() + i));
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@ -220,15 +220,15 @@ struct VlogHammerReporter
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}
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log(" Testing if SAT solution is unique.\n");
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ez.assume(ez.vec_ne(cmp_vars, ez.vec_const(cmp_vals)));
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if (ez.solve(y_vec, y_values))
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ez->assume(ez->vec_ne(cmp_vars, ez->vec_const(cmp_vals)));
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if (ez->solve(y_vec, y_values))
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log_error("Found two distinct solutions to SAT problem.\n");
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}
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else
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{
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log(" Testing if SAT solution is unique.\n");
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ez.assume(ez.vec_ne(y_vec, ez.vec_const(y_values)));
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if (ez.solve(y_vec, y_values))
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ez->assume(ez->vec_ne(y_vec, ez->vec_const(y_values)));
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if (ez->solve(y_vec, y_values))
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log_error("Found two distinct solutions to SAT problem.\n");
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}
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@ -73,7 +73,7 @@ struct FindReducedInputs
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SigMap &sigmap;
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drivers_t &drivers;
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ezDefaultSAT ez;
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ezSatPtr ez;
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std::set<RTLIL::Cell*> ez_cells;
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SatGen satgen;
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@ -81,7 +81,7 @@ struct FindReducedInputs
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std::vector<int> sat_pi_uniq_bitvec;
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FindReducedInputs(SigMap &sigmap, drivers_t &drivers) :
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sigmap(sigmap), drivers(drivers), satgen(&ez, &sigmap)
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sigmap(sigmap), drivers(drivers), satgen(ez.get(), &sigmap)
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{
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satgen.model_undef = true;
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}
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@ -104,30 +104,30 @@ struct FindReducedInputs
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satgen.setContext(&sigmap, "A");
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int sat_a = satgen.importSigSpec(bit).front();
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ez.assume(ez.NOT(satgen.importUndefSigSpec(bit).front()));
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ez->assume(ez->NOT(satgen.importUndefSigSpec(bit).front()));
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satgen.setContext(&sigmap, "B");
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int sat_b = satgen.importSigSpec(bit).front();
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ez.assume(ez.NOT(satgen.importUndefSigSpec(bit).front()));
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ez->assume(ez->NOT(satgen.importUndefSigSpec(bit).front()));
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int idx = sat_pi.size();
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size_t idx_bits = get_bits(idx);
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if (sat_pi_uniq_bitvec.size() != idx_bits) {
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sat_pi_uniq_bitvec.push_back(ez.frozen_literal(stringf("uniq_%d", int(idx_bits)-1)));
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sat_pi_uniq_bitvec.push_back(ez->frozen_literal(stringf("uniq_%d", int(idx_bits)-1)));
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for (auto &it : sat_pi)
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ez.assume(ez.OR(ez.NOT(it.second), ez.NOT(sat_pi_uniq_bitvec.back())));
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ez->assume(ez->OR(ez->NOT(it.second), ez->NOT(sat_pi_uniq_bitvec.back())));
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}
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log_assert(sat_pi_uniq_bitvec.size() == idx_bits);
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sat_pi[bit] = ez.frozen_literal(stringf("p, falsei_%s", log_signal(bit)));
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ez.assume(ez.IFF(ez.XOR(sat_a, sat_b), sat_pi[bit]));
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sat_pi[bit] = ez->frozen_literal(stringf("p, falsei_%s", log_signal(bit)));
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ez->assume(ez->IFF(ez->XOR(sat_a, sat_b), sat_pi[bit]));
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for (size_t i = 0; i < idx_bits; i++)
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if ((idx & (1 << i)) == 0)
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ez.assume(ez.OR(ez.NOT(sat_pi[bit]), ez.NOT(sat_pi_uniq_bitvec[i])));
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ez->assume(ez->OR(ez->NOT(sat_pi[bit]), ez->NOT(sat_pi_uniq_bitvec[i])));
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else
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ez.assume(ez.OR(ez.NOT(sat_pi[bit]), sat_pi_uniq_bitvec[i]));
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ez->assume(ez->OR(ez->NOT(sat_pi[bit]), sat_pi_uniq_bitvec[i]));
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}
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void register_cone_worker(std::set<RTLIL::SigBit> &pi, std::set<RTLIL::SigBit> &sigdone, RTLIL::SigBit out)
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@ -201,7 +201,7 @@ struct FindReducedInputs
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model_expr.push_back(sat_pi.at(pi[i]));
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}
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if (!ez.solve(model_expr, model, ez.expression(ezSAT::OpOr, model_expr), ez.XOR(output_a, output_b), ez.NOT(output_undef_a), ez.NOT(output_undef_b)))
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if (!ez->solve(model_expr, model, ez->expression(ezSAT::OpOr, model_expr), ez->XOR(output_a, output_b), ez->NOT(output_undef_a), ez->NOT(output_undef_b)))
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break;
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int found_count = 0;
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@ -230,7 +230,7 @@ struct PerformReduction
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drivers_t &drivers;
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std::set<std::pair<RTLIL::SigBit, RTLIL::SigBit>> &inv_pairs;
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ezDefaultSAT ez;
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ezSatPtr ez;
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SatGen satgen;
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std::vector<int> sat_pi, sat_out, sat_def;
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@ -260,7 +260,7 @@ struct PerformReduction
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} else {
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pi_bits.push_back(out);
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sat_pi.push_back(satgen.importSigSpec(out).front());
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ez.assume(ez.NOT(satgen.importUndefSigSpec(out).front()));
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ez->assume(ez->NOT(satgen.importUndefSigSpec(out).front()));
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sigdepth[out] = 0;
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}
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@ -268,7 +268,7 @@ struct PerformReduction
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}
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PerformReduction(SigMap &sigmap, drivers_t &drivers, std::set<std::pair<RTLIL::SigBit, RTLIL::SigBit>> &inv_pairs, std::vector<RTLIL::SigBit> &bits, int cone_size) :
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sigmap(sigmap), drivers(drivers), inv_pairs(inv_pairs), satgen(&ez, &sigmap), out_bits(bits), cone_size(cone_size)
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sigmap(sigmap), drivers(drivers), inv_pairs(inv_pairs), satgen(ez.get(), &sigmap), out_bits(bits), cone_size(cone_size)
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{
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satgen.model_undef = true;
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@ -278,15 +278,15 @@ struct PerformReduction
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for (auto &bit : bits) {
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out_depth.push_back(register_cone_worker(celldone, sigdepth, bit));
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sat_out.push_back(satgen.importSigSpec(bit).front());
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sat_def.push_back(ez.NOT(satgen.importUndefSigSpec(bit).front()));
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sat_def.push_back(ez->NOT(satgen.importUndefSigSpec(bit).front()));
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}
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if (inv_mode && cone_size > 0) {
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if (!ez.solve(sat_out, out_inverted, ez.expression(ezSAT::OpAnd, sat_def)))
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if (!ez->solve(sat_out, out_inverted, ez->expression(ezSAT::OpAnd, sat_def)))
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log_error("Solving for initial model failed!\n");
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for (size_t i = 0; i < sat_out.size(); i++)
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if (out_inverted.at(i))
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sat_out[i] = ez.NOT(sat_out[i]);
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sat_out[i] = ez->NOT(sat_out[i]);
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} else
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out_inverted = std::vector<bool>(sat_out.size(), false);
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}
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@ -296,8 +296,8 @@ struct PerformReduction
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if (verbose_level == 1)
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log(" Finding const value for %s.\n", log_signal(out_bits[idx]));
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bool can_be_set = ez.solve(ez.AND(sat_out[idx], sat_def[idx]));
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bool can_be_clr = ez.solve(ez.AND(ez.NOT(sat_out[idx]), sat_def[idx]));
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bool can_be_set = ez->solve(ez->AND(sat_out[idx], sat_def[idx]));
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bool can_be_clr = ez->solve(ez->AND(ez->NOT(sat_out[idx]), sat_def[idx]));
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log_assert(!can_be_set || !can_be_clr);
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RTLIL::SigBit value(RTLIL::State::Sx);
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@ -355,8 +355,8 @@ struct PerformReduction
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std::vector<int> sat_set_list, sat_clr_list;
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for (int idx : bucket) {
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sat_set_list.push_back(ez.AND(sat_out[idx], sat_def[idx]));
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sat_clr_list.push_back(ez.AND(ez.NOT(sat_out[idx]), sat_def[idx]));
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sat_set_list.push_back(ez->AND(sat_out[idx], sat_def[idx]));
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sat_clr_list.push_back(ez->AND(ez->NOT(sat_out[idx]), sat_def[idx]));
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}
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std::vector<int> modelVars = sat_out;
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@ -366,7 +366,7 @@ struct PerformReduction
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if (verbose_level >= 2)
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modelVars.insert(modelVars.end(), sat_pi.begin(), sat_pi.end());
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if (ez.solve(modelVars, model, ez.expression(ezSAT::OpOr, sat_set_list), ez.expression(ezSAT::OpOr, sat_clr_list)))
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if (ez->solve(modelVars, model, ez->expression(ezSAT::OpOr, sat_set_list), ez->expression(ezSAT::OpOr, sat_clr_list)))
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{
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int iter_count = 1;
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@ -379,13 +379,13 @@ struct PerformReduction
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for (int idx : bucket)
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if (!model[sat_out.size() + idx]) {
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sat_set_list.push_back(ez.AND(sat_out[idx], sat_def[idx]));
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sat_clr_list.push_back(ez.AND(ez.NOT(sat_out[idx]), sat_def[idx]));
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sat_set_list.push_back(ez->AND(sat_out[idx], sat_def[idx]));
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sat_clr_list.push_back(ez->AND(ez->NOT(sat_out[idx]), sat_def[idx]));
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} else {
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sat_def_list.push_back(sat_def[idx]);
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}
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if (!ez.solve(modelVars, model, ez.expression(ezSAT::OpOr, sat_set_list), ez.expression(ezSAT::OpOr, sat_clr_list), ez.expression(ezSAT::OpAnd, sat_def_list)))
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if (!ez->solve(modelVars, model, ez->expression(ezSAT::OpOr, sat_set_list), ez->expression(ezSAT::OpOr, sat_clr_list), ez->expression(ezSAT::OpAnd, sat_def_list)))
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break;
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iter_count++;
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}
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@ -431,7 +431,7 @@ struct PerformReduction
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for (int idx2 : bucket)
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if (idx != idx2)
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sat_def_list.push_back(sat_def[idx2]);
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if (ez.solve(ez.NOT(sat_def[idx]), ez.expression(ezSAT::OpOr, sat_def_list)))
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if (ez->solve(ez->NOT(sat_def[idx]), ez->expression(ezSAT::OpOr, sat_def_list)))
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undef_slaves.push_back(idx);
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}
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@ -505,7 +505,7 @@ struct PerformReduction
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for (int idx2 : r)
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if (idx != idx2)
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sat_def_list.push_back(sat_def[idx2]);
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if (ez.solve(ez.NOT(sat_def[idx]), ez.expression(ezSAT::OpOr, sat_def_list)))
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if (ez->solve(ez->NOT(sat_def[idx]), ez->expression(ezSAT::OpOr, sat_def_list)))
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undef_slaves.push_back(idx);
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}
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@ -41,9 +41,10 @@ struct SatHelper
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RTLIL::Design *design;
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RTLIL::Module *module;
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ezDefaultSAT ez;
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SigMap sigmap;
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CellTypes ct;
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ezSatPtr ez;
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SatGen satgen;
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// additional constraints
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@ -65,7 +66,7 @@ struct SatHelper
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bool gotTimeout;
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SatHelper(RTLIL::Design *design, RTLIL::Module *module, bool enable_undef) :
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design(design), module(module), sigmap(module), ct(design), satgen(&ez, &sigmap)
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design(design), module(module), sigmap(module), ct(design), satgen(ez.get(), &sigmap)
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{
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this->enable_undef = enable_undef;
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satgen.model_undef = enable_undef;
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@ -155,7 +156,7 @@ struct SatHelper
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if (set_init_def) {
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RTLIL::SigSpec rem = satgen.initial_state.export_all();
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std::vector<int> undef_rem = satgen.importUndefSigSpec(rem, 1);
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ez.assume(ez.NOT(ez.expression(ezSAT::OpOr, undef_rem)));
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ez->assume(ez->NOT(ez->expression(ezSAT::OpOr, undef_rem)));
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}
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if (set_init_undef) {
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@ -179,7 +180,7 @@ struct SatHelper
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log("Final constraint equation: %s = %s\n\n", log_signal(big_lhs), log_signal(big_rhs));
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check_undef_enabled(big_lhs), check_undef_enabled(big_rhs);
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ez.assume(satgen.signals_eq(big_lhs, big_rhs, 1));
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ez->assume(satgen.signals_eq(big_lhs, big_rhs, 1));
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}
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void setup(int timestep = -1)
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@ -250,7 +251,7 @@ struct SatHelper
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log("Final constraint equation: %s = %s\n", log_signal(big_lhs), log_signal(big_rhs));
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check_undef_enabled(big_lhs), check_undef_enabled(big_rhs);
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ez.assume(satgen.signals_eq(big_lhs, big_rhs, timestep));
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ez->assume(satgen.signals_eq(big_lhs, big_rhs, timestep));
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// 0 = sets_def
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// 1 = sets_any_undef
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@ -310,11 +311,11 @@ struct SatHelper
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log("Import %s constraint for this timestep: %s\n", t == 0 ? "def" : t == 1 ? "any_undef" : "all_undef", log_signal(sig));
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std::vector<int> undef_sig = satgen.importUndefSigSpec(sig, timestep);
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if (t == 0)
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ez.assume(ez.NOT(ez.expression(ezSAT::OpOr, undef_sig)));
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ez->assume(ez->NOT(ez->expression(ezSAT::OpOr, undef_sig)));
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if (t == 1)
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ez.assume(ez.expression(ezSAT::OpOr, undef_sig));
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ez->assume(ez->expression(ezSAT::OpOr, undef_sig));
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if (t == 2)
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ez.assume(ez.expression(ezSAT::OpAnd, undef_sig));
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ez->assume(ez->expression(ezSAT::OpAnd, undef_sig));
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}
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int import_cell_counter = 0;
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@ -401,7 +402,7 @@ struct SatHelper
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std::vector<int> undef_rhs = satgen.importUndefSigSpec(big_rhs, timestep);
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for (size_t i = 0; i < value_lhs.size(); i++)
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prove_bits.push_back(ez.OR(undef_lhs.at(i), ez.AND(ez.NOT(undef_rhs.at(i)), ez.NOT(ez.XOR(value_lhs.at(i), value_rhs.at(i))))));
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prove_bits.push_back(ez->OR(undef_lhs.at(i), ez->AND(ez->NOT(undef_rhs.at(i)), ez->NOT(ez->XOR(value_lhs.at(i), value_rhs.at(i))))));
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}
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if (prove_asserts) {
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@ -412,22 +413,22 @@ struct SatHelper
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prove_bits.push_back(satgen.importAsserts(timestep));
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}
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return ez.expression(ezSAT::OpAnd, prove_bits);
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return ez->expression(ezSAT::OpAnd, prove_bits);
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}
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void force_unique_state(int timestep_from, int timestep_to)
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{
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RTLIL::SigSpec state_signals = satgen.initial_state.export_all();
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for (int i = timestep_from; i < timestep_to; i++)
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ez.assume(ez.NOT(satgen.signals_eq(state_signals, state_signals, i, timestep_to)));
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ez->assume(ez->NOT(satgen.signals_eq(state_signals, state_signals, i, timestep_to)));
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}
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bool solve(const std::vector<int> &assumptions)
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{
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log_assert(gotTimeout == false);
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ez.setSolverTimeout(timeout);
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bool success = ez.solve(modelExpressions, modelValues, assumptions);
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if (ez.getSolverTimoutStatus())
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ez->setSolverTimeout(timeout);
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bool success = ez->solve(modelExpressions, modelValues, assumptions);
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if (ez->getSolverTimoutStatus())
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gotTimeout = true;
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return success;
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}
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@ -435,9 +436,9 @@ struct SatHelper
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bool solve(int a = 0, int b = 0, int c = 0, int d = 0, int e = 0, int f = 0)
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{
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log_assert(gotTimeout == false);
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ez.setSolverTimeout(timeout);
|
||||
bool success = ez.solve(modelExpressions, modelValues, a, b, c, d, e, f);
|
||||
if (ez.getSolverTimoutStatus())
|
||||
ez->setSolverTimeout(timeout);
|
||||
bool success = ez->solve(modelExpressions, modelValues, a, b, c, d, e, f);
|
||||
if (ez->getSolverTimoutStatus())
|
||||
gotTimeout = true;
|
||||
return success;
|
||||
}
|
||||
|
@ -478,7 +479,7 @@ struct SatHelper
|
|||
maybe_undef.push_back(modelExpressions.at(modelExpressions.size()/2 + i));
|
||||
|
||||
backupValues.swap(modelValues);
|
||||
if (!solve(ez.expression(ezSAT::OpAnd, must_undef), ez.expression(ezSAT::OpOr, maybe_undef)))
|
||||
if (!solve(ez->expression(ezSAT::OpAnd, must_undef), ez->expression(ezSAT::OpOr, maybe_undef)))
|
||||
break;
|
||||
}
|
||||
|
||||
|
@ -832,12 +833,12 @@ struct SatHelper
|
|||
int bit = modelExpressions.at(i), bit_undef = modelExpressions.at(modelExpressions.size()/2 + i);
|
||||
bool val = modelValues.at(i), val_undef = modelValues.at(modelExpressions.size()/2 + i);
|
||||
if (!max_undef || !val_undef)
|
||||
clause.push_back(val_undef ? ez.NOT(bit_undef) : val ? ez.NOT(bit) : bit);
|
||||
clause.push_back(val_undef ? ez->NOT(bit_undef) : val ? ez->NOT(bit) : bit);
|
||||
}
|
||||
} else
|
||||
for (size_t i = 0; i < modelExpressions.size(); i++)
|
||||
clause.push_back(modelValues.at(i) ? ez.NOT(modelExpressions.at(i)) : modelExpressions.at(i));
|
||||
ez.assume(ez.expression(ezSAT::OpOr, clause));
|
||||
clause.push_back(modelValues.at(i) ? ez->NOT(modelExpressions.at(i)) : modelExpressions.at(i));
|
||||
ez->assume(ez->expression(ezSAT::OpOr, clause));
|
||||
}
|
||||
};
|
||||
|
||||
|
@ -1319,11 +1320,11 @@ struct SatPass : public Pass {
|
|||
inductstep.ignore_unknown_cells = ignore_unknown_cells;
|
||||
|
||||
inductstep.setup(1);
|
||||
inductstep.ez.assume(inductstep.setup_proof(1));
|
||||
inductstep.ez->assume(inductstep.setup_proof(1));
|
||||
|
||||
if (tempinduct_def) {
|
||||
std::vector<int> undef_state = inductstep.satgen.importUndefSigSpec(inductstep.satgen.initial_state.export_all(), 1);
|
||||
inductstep.ez.assume(inductstep.ez.NOT(inductstep.ez.expression(ezSAT::OpOr, undef_state)));
|
||||
inductstep.ez->assume(inductstep.ez->NOT(inductstep.ez->expression(ezSAT::OpOr, undef_state)));
|
||||
}
|
||||
|
||||
for (int inductlen = 1; inductlen <= maxsteps || maxsteps == 0; inductlen++)
|
||||
|
@ -1340,9 +1341,9 @@ struct SatPass : public Pass {
|
|||
basecase.force_unique_state(seq_len + 1, seq_len + inductlen);
|
||||
|
||||
log("\n[base case] Solving problem with %d variables and %d clauses..\n",
|
||||
basecase.ez.numCnfVariables(), basecase.ez.numCnfClauses());
|
||||
basecase.ez->numCnfVariables(), basecase.ez->numCnfClauses());
|
||||
|
||||
if (basecase.solve(basecase.ez.NOT(property))) {
|
||||
if (basecase.solve(basecase.ez->NOT(property))) {
|
||||
log("SAT temporal induction proof finished - model found for base case: FAIL!\n");
|
||||
print_proof_failed();
|
||||
basecase.print_model();
|
||||
|
@ -1357,7 +1358,7 @@ struct SatPass : public Pass {
|
|||
goto timeout;
|
||||
|
||||
log("Base case for induction length %d proven.\n", inductlen);
|
||||
basecase.ez.assume(property);
|
||||
basecase.ez->assume(property);
|
||||
|
||||
// phase 2: proving induction step
|
||||
|
||||
|
@ -1371,8 +1372,8 @@ struct SatPass : public Pass {
|
|||
if (inductlen < initsteps)
|
||||
{
|
||||
log("\n[induction step] Skipping problem with %d variables and %d clauses (below initsteps).\n",
|
||||
inductstep.ez.numCnfVariables(), inductstep.ez.numCnfClauses());
|
||||
inductstep.ez.assume(property);
|
||||
inductstep.ez->numCnfVariables(), inductstep.ez->numCnfClauses());
|
||||
inductstep.ez->assume(property);
|
||||
}
|
||||
else
|
||||
{
|
||||
|
@ -1385,14 +1386,14 @@ struct SatPass : public Pass {
|
|||
log("Dumping CNF to file `%s'.\n", cnf_file_name.c_str());
|
||||
cnf_file_name.clear();
|
||||
|
||||
inductstep.ez.printDIMACS(f, false);
|
||||
inductstep.ez->printDIMACS(f, false);
|
||||
fclose(f);
|
||||
}
|
||||
|
||||
log("\n[induction step] Solving problem with %d variables and %d clauses..\n",
|
||||
inductstep.ez.numCnfVariables(), inductstep.ez.numCnfClauses());
|
||||
inductstep.ez->numCnfVariables(), inductstep.ez->numCnfClauses());
|
||||
|
||||
if (!inductstep.solve(inductstep.ez.NOT(property))) {
|
||||
if (!inductstep.solve(inductstep.ez->NOT(property))) {
|
||||
if (inductstep.gotTimeout)
|
||||
goto timeout;
|
||||
log("Induction step proven: SUCCESS!\n");
|
||||
|
@ -1401,7 +1402,7 @@ struct SatPass : public Pass {
|
|||
}
|
||||
|
||||
log("Induction step failed. Incrementing induction length.\n");
|
||||
inductstep.ez.assume(property);
|
||||
inductstep.ez->assume(property);
|
||||
inductstep.print_model();
|
||||
}
|
||||
}
|
||||
|
@ -1457,7 +1458,7 @@ struct SatPass : public Pass {
|
|||
if (seq_len == 0) {
|
||||
sathelper.setup();
|
||||
if (sathelper.prove.size() || sathelper.prove_x.size() || sathelper.prove_asserts)
|
||||
sathelper.ez.assume(sathelper.ez.NOT(sathelper.setup_proof()));
|
||||
sathelper.ez->assume(sathelper.ez->NOT(sathelper.setup_proof()));
|
||||
} else {
|
||||
std::vector<int> prove_bits;
|
||||
for (int timestep = 1; timestep <= seq_len; timestep++) {
|
||||
|
@ -1467,7 +1468,7 @@ struct SatPass : public Pass {
|
|||
prove_bits.push_back(sathelper.setup_proof(timestep));
|
||||
}
|
||||
if (sathelper.prove.size() || sathelper.prove_x.size() || sathelper.prove_asserts)
|
||||
sathelper.ez.assume(sathelper.ez.NOT(sathelper.ez.expression(ezSAT::OpAnd, prove_bits)));
|
||||
sathelper.ez->assume(sathelper.ez->NOT(sathelper.ez->expression(ezSAT::OpAnd, prove_bits)));
|
||||
sathelper.setup_init();
|
||||
}
|
||||
sathelper.generate_model();
|
||||
|
@ -1481,7 +1482,7 @@ struct SatPass : public Pass {
|
|||
log("Dumping CNF to file `%s'.\n", cnf_file_name.c_str());
|
||||
cnf_file_name.clear();
|
||||
|
||||
sathelper.ez.printDIMACS(f, false);
|
||||
sathelper.ez->printDIMACS(f, false);
|
||||
fclose(f);
|
||||
}
|
||||
|
||||
|
@ -1489,7 +1490,7 @@ struct SatPass : public Pass {
|
|||
|
||||
rerun_solver:
|
||||
log("\nSolving problem with %d variables and %d clauses..\n",
|
||||
sathelper.ez.numCnfVariables(), sathelper.ez.numCnfClauses());
|
||||
sathelper.ez->numCnfVariables(), sathelper.ez->numCnfClauses());
|
||||
|
||||
if (sathelper.solve())
|
||||
{
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue