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Add support for memory writes in processes.

This commit is contained in:
Marcelina Kościelnicka 2021-02-23 00:21:46 +01:00
parent c00a29296c
commit 4e03865d5b
16 changed files with 246 additions and 44 deletions

View file

@ -339,6 +339,23 @@ struct BugpointPass : public Pass {
return design_copy;
}
}
int i = 0;
for (auto it = sy->mem_write_actions.begin(); it != sy->mem_write_actions.end(); ++it, ++i)
{
if (index++ == seed)
{
log_header(design, "Trying to remove sync %s memwr %s %s %s %s in %s.%s.\n", log_signal(sy->signal), log_id(it->memid), log_signal(it->address), log_signal(it->data), log_signal(it->enable), log_id(mod), log_id(pr.first));
sy->mem_write_actions.erase(it);
// Remove the bit for removed action from other actions' priority masks.
for (auto it2 = sy->mem_write_actions.begin(); it2 != sy->mem_write_actions.end(); ++it2) {
auto &mask = it2->priority_mask;
if (GetSize(mask) > i) {
mask.bits.erase(mask.bits.begin() + i);
}
}
return design_copy;
}
}
}
}
}

View file

@ -141,6 +141,14 @@ struct CheckPass : public Pass {
for (auto bit : sigmap(action.second))
if (bit.wire) used_wires.insert(bit);
}
for (auto memwr : sync->mem_write_actions) {
for (auto bit : sigmap(memwr.address))
if (bit.wire) used_wires.insert(bit);
for (auto bit : sigmap(memwr.data))
if (bit.wire) used_wires.insert(bit);
for (auto bit : sigmap(memwr.enable))
if (bit.wire) used_wires.insert(bit);
}
}
}

View file

@ -339,6 +339,11 @@ struct ShowWorker
{
input_signals.insert(obj->signal);
collect_proc_signals(obj->actions, input_signals, output_signals);
for (auto it : obj->mem_write_actions) {
input_signals.insert(it.address);
input_signals.insert(it.data);
input_signals.insert(it.enable);
}
}
void collect_proc_signals(RTLIL::Process *obj, std::set<RTLIL::SigSpec> &input_signals, std::set<RTLIL::SigSpec> &output_signals)