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Fix static initialization, fixes mingw build

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This commit is contained in:
Miodrag Milanovic 2022-07-04 19:31:38 +02:00
parent da0682b99a
commit 4db820e9d4
1 changed files with 21 additions and 20 deletions
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23
techlibs/gatemate/gatemate_foldinv.cc
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@ -34,7 +34,17 @@ struct LUTType {
IdString output_param; IdString output_param;
}; };
static const dict<IdString, LUTType> lut_types = { struct FoldInvWorker {
FoldInvWorker(Module *module) : module(module), sigmap(module) {};
Module *module;
SigMap sigmap;
// Mapping from inverter output to inverter input
dict<SigBit, SigBit> inverted_bits;
// Mapping from inverter input to inverter
dict<SigBit, Cell*> inverter_input;
const dict<IdString, LUTType> lut_types = {
{ID(CC_LUT2), {{ {ID(CC_LUT2), {{
{ID(I0), {0, ID(INIT)}}, {ID(I0), {0, ID(INIT)}},
{ID(I1), {1, ID(INIT)}}, {ID(I1), {1, ID(INIT)}},
@ -52,17 +62,8 @@ static const dict<IdString, LUTType> lut_types = {
{ID(I3), {1, ID(INIT_L03)}}, {ID(I3), {1, ID(INIT_L03)}},
{ID(I4), {0, ID(INIT_L20)}}, {ID(I4), {0, ID(INIT_L20)}},
}, ID(INIT_L20)}}, }, ID(INIT_L20)}},
}; };
struct FoldInvWorker {
FoldInvWorker(Module *module) : module(module), sigmap(module) {};
Module *module;
SigMap sigmap;
// Mapping from inverter output to inverter input
dict<SigBit, SigBit> inverted_bits;
// Mapping from inverter input to inverter
dict<SigBit, Cell*> inverter_input;
void find_inverted_bits() void find_inverted_bits()
{ {