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Add test for pmux2shiftx

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Signed-off-by: Clifford Wolf <clifford@clifford.at>
This commit is contained in:
Clifford Wolf 2019-04-19 20:23:09 +02:00
parent 177878cbb0
commit 4c831d72ef
2 changed files with 52 additions and 0 deletions
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tests/various/pmux2shiftx.v Normal file
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module pmux2shiftx_test (
input [2:0] S1,
input [5:0] S2,
input [9:0] A, B, C, D, D, E, F,
input [9:0] G, H, I, J, K, L, M, N,
output reg [9:0] X
);
always @* begin
case (S1)
3'd0: X = A;
3'd1: X = B;
3'd2: X = C;
3'd3: X = D;
3'd4: X = E;
3'd5: X = F;
3'd6: X = G;
3'd7: X = H;
endcase
case (S2)
6'd46: X = I;
6'd47: X = J;
6'd48: X = K;
6'd52: X = L;
6'd53: X = M;
6'd54: X = N;
endcase
end
endmodule

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tests/various/pmux2shiftx.ys Normal file
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read_verilog pmux2shiftx.v
prep
design -save gold
pmux2shiftx
opt
# show -width
select -assert-count 1 t:$mux
select -assert-count 1 t:$shift
select -assert-count 2 t:$shiftx
select -assert-count 1 t:$sub
design -stash gate
design -import gold -as gold
design -import gate -as gate
miter -equiv -flatten -make_assert -make_outputs gold gate miter
sat -verify -prove-asserts -show-ports miter
design -load gold
stat
design -load gate
stat