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Refactoring: Renamed RTLIL::Module::cells to cells_

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This commit is contained in:
Clifford Wolf 2014-07-27 01:51:45 +02:00
parent f9946232ad
commit 4c4b602156
61 changed files with 152 additions and 152 deletions
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2
passes/cmds/delete.cc
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@ -103,7 +103,7 @@ struct DeletePass : public Pass {
if (design->selected(module, it.second))
delete_mems.insert(it.first);
for (auto &it : module->cells) {
for (auto &it : module->cells_) {
if (design->selected(module, it.second))
delete_cells.insert(it.second);
if ((it.second->type == "$memrd" || it.second->type == "$memwr") &&