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verilog: fix size and signedness of array querying functions

genrtlil.cc and simplify.cc had inconsistent and slightly broken
handling of signedness for array querying functions. These functions are
defined to return a signed result. Simplify always produced an unsigned
and genrtlil always a signed 32-bit result ignoring the context.

Includes tests for the the relvant edge cases for context dependent
conversions.
This commit is contained in:
Jannis Harder 2022-05-20 21:46:39 +02:00 committed by Zachary Snow
parent ce24208a8b
commit 4bfaaea0d5
4 changed files with 56 additions and 3 deletions

View file

@ -1089,8 +1089,7 @@ void AstNode::detectSignWidthWorker(int &width_hint, bool &sign_hint, bool *foun
break;
}
if (str == "\\$size" || str == "\\$bits" || str == "\\$high" || str == "\\$low" || str == "\\$left" || str == "\\$right") {
width_hint = 32;
sign_hint = true;
width_hint = max(width_hint, 32);
break;
}
if (current_scope.count(str))

View file

@ -3450,7 +3450,7 @@ skip_dynamic_range_lvalue_expansion:;
else {
result = width * mem_depth;
}
newNode = mkconst_int(result, false);
newNode = mkconst_int(result, true);
goto apply_newNode;
}