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verific: Extend -sva-continue-on-err to handle FSM explosion
This also rolls back any added cells and wires, since we might have added a lot of helper logic by the point we detect this.
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ce5d04a42f
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4bb4b6c662
2 changed files with 63 additions and 2 deletions
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@ -124,6 +124,7 @@ struct SvaFsm
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{
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{
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Module *module;
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Module *module;
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VerificClocking clocking;
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VerificClocking clocking;
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std::function<void (std::string)> parser_error;
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SigBit trigger_sig = State::S1, disable_sig;
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SigBit trigger_sig = State::S1, disable_sig;
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SigBit throughout_sig = State::S1;
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SigBit throughout_sig = State::S1;
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@ -148,6 +149,7 @@ struct SvaFsm
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module = clking.module;
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module = clking.module;
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clocking = clking;
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clocking = clking;
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trigger_sig = trig;
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trigger_sig = trig;
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parser_error = [](std::string msg){ log_error("%s", msg); };
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startNode = createNode();
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startNode = createNode();
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acceptNode = createNode();
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acceptNode = createNode();
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@ -475,8 +477,8 @@ struct SvaFsm
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dump();
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dump();
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log(" ctrl signal: %s\n", log_signal(dnode.ctrl));
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log(" ctrl signal: %s\n", log_signal(dnode.ctrl));
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}
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}
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log_error("SVA DFSM state ctrl signal has %d (>%d) bits. Stopping to prevent exponential design size explosion.\n",
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parser_error(stringf("SVA DFSM state ctrl signal has %d (>%d) bits. Stopping to prevent exponential design size explosion.\n",
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GetSize(dnode.ctrl), verific_sva_fsm_limit);
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GetSize(dnode.ctrl), verific_sva_fsm_limit));
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}
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}
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for (unsigned long long i = 0; i < (1ull << GetSize(dnode.ctrl)); i++)
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for (unsigned long long i = 0; i < (1ull << GetSize(dnode.ctrl)); i++)
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@ -1260,6 +1262,7 @@ struct VerificSvaImporter
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if (inst->Type() == PRIM_SVA_FIRST_MATCH)
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if (inst->Type() == PRIM_SVA_FIRST_MATCH)
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{
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{
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SvaFsm match_fsm(clocking);
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SvaFsm match_fsm(clocking);
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match_fsm.parser_error = [&](std::string msg) { this->parser_error(msg); };
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match_fsm.createLink(parse_sequence(match_fsm, match_fsm.createStartNode(), inst->GetInput()), match_fsm.acceptNode);
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match_fsm.createLink(parse_sequence(match_fsm, match_fsm.createStartNode(), inst->GetInput()), match_fsm.acceptNode);
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int node = fsm.createNode();
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int node = fsm.createNode();
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@ -1426,12 +1429,15 @@ struct VerificSvaImporter
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if (inst->Type() == PRIM_SVA_SEQ_AND || inst->Type() == PRIM_SVA_AND)
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if (inst->Type() == PRIM_SVA_SEQ_AND || inst->Type() == PRIM_SVA_AND)
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{
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{
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SvaFsm fsm1(clocking);
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SvaFsm fsm1(clocking);
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fsm1.parser_error = [&](std::string msg) { this->parser_error(msg); };
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fsm1.createLink(parse_sequence(fsm1, fsm1.createStartNode(), inst->GetInput1()), fsm1.acceptNode);
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fsm1.createLink(parse_sequence(fsm1, fsm1.createStartNode(), inst->GetInput1()), fsm1.acceptNode);
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SvaFsm fsm2(clocking);
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SvaFsm fsm2(clocking);
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fsm2.parser_error = [&](std::string msg) { this->parser_error(msg); };
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fsm2.createLink(parse_sequence(fsm2, fsm2.createStartNode(), inst->GetInput2()), fsm2.acceptNode);
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fsm2.createLink(parse_sequence(fsm2, fsm2.createStartNode(), inst->GetInput2()), fsm2.acceptNode);
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SvaFsm combined_fsm(clocking);
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SvaFsm combined_fsm(clocking);
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combined_fsm.parser_error = [&](std::string msg) { this->parser_error(msg); };
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fsm1.getDFsm(combined_fsm, combined_fsm.createStartNode(), -1, combined_fsm.acceptNode);
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fsm1.getDFsm(combined_fsm, combined_fsm.createStartNode(), -1, combined_fsm.acceptNode);
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fsm2.getDFsm(combined_fsm, combined_fsm.createStartNode(), -1, combined_fsm.acceptNode);
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fsm2.getDFsm(combined_fsm, combined_fsm.createStartNode(), -1, combined_fsm.acceptNode);
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@ -1456,6 +1462,7 @@ struct VerificSvaImporter
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if (inst->Type() == PRIM_SVA_INTERSECT || inst->Type() == PRIM_SVA_WITHIN)
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if (inst->Type() == PRIM_SVA_INTERSECT || inst->Type() == PRIM_SVA_WITHIN)
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{
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{
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SvaFsm intersect_fsm(clocking);
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SvaFsm intersect_fsm(clocking);
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intersect_fsm.parser_error = [&](std::string msg) { this->parser_error(msg); };
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if (inst->Type() == PRIM_SVA_INTERSECT)
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if (inst->Type() == PRIM_SVA_INTERSECT)
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{
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{
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@ -1562,6 +1569,7 @@ struct VerificSvaImporter
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int node;
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int node;
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SvaFsm antecedent_fsm(clocking, trig);
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SvaFsm antecedent_fsm(clocking, trig);
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antecedent_fsm.parser_error = [&](std::string msg) { this->parser_error(msg); };
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node = parse_sequence(antecedent_fsm, antecedent_fsm.createStartNode(), antecedent_net);
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node = parse_sequence(antecedent_fsm, antecedent_fsm.createStartNode(), antecedent_net);
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if (inst->Type() == PRIM_SVA_NON_OVERLAPPED_IMPLICATION) {
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if (inst->Type() == PRIM_SVA_NON_OVERLAPPED_IMPLICATION) {
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int next_node = antecedent_fsm.createNode();
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int next_node = antecedent_fsm.createNode();
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@ -1623,6 +1631,7 @@ struct VerificSvaImporter
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int node;
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int node;
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SvaFsm antecedent_fsm(clocking, trig);
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SvaFsm antecedent_fsm(clocking, trig);
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antecedent_fsm.parser_error = [&](std::string msg) { this->parser_error(msg); };
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node = parse_sequence(antecedent_fsm, antecedent_fsm.createStartNode(), antecedent_net);
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node = parse_sequence(antecedent_fsm, antecedent_fsm.createStartNode(), antecedent_net);
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if (inst->Type() == PRIM_SVA_NON_OVERLAPPED_IMPLICATION || inst->Type() == PRIM_SVA_NON_OVERLAPPED_FOLLOWED_BY) {
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if (inst->Type() == PRIM_SVA_NON_OVERLAPPED_IMPLICATION || inst->Type() == PRIM_SVA_NON_OVERLAPPED_FOLLOWED_BY) {
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int next_node = antecedent_fsm.createNode();
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int next_node = antecedent_fsm.createNode();
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@ -1677,6 +1686,7 @@ struct VerificSvaImporter
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}
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}
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SvaFsm consequent_fsm(clocking, antecedent_match);
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SvaFsm consequent_fsm(clocking, antecedent_match);
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consequent_fsm.parser_error = [&](std::string msg) { this->parser_error(msg); };
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node = parse_sequence(consequent_fsm, consequent_fsm.createStartNode(), consequent_net);
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node = parse_sequence(consequent_fsm, consequent_fsm.createStartNode(), consequent_net);
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consequent_fsm.createLink(node, consequent_fsm.acceptNode);
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consequent_fsm.createLink(node, consequent_fsm.acceptNode);
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@ -1696,6 +1706,7 @@ struct VerificSvaImporter
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}
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}
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SvaFsm fsm(clocking, trig);
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SvaFsm fsm(clocking, trig);
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fsm.parser_error = [&](std::string msg) { this->parser_error(msg); };
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int node = parse_sequence(fsm, fsm.createStartNode(), net);
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int node = parse_sequence(fsm, fsm.createStartNode(), net);
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fsm.createLink(node, fsm.acceptNode);
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fsm.createLink(node, fsm.acceptNode);
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@ -1713,6 +1724,10 @@ struct VerificSvaImporter
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module = importer->module;
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module = importer->module;
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netlist = root->Owner();
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netlist = root->Owner();
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int initial_cell_count = GetSize(module->cells_);
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int initial_wire_count = GetSize(module->wires_);
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int initial_connection_count = GetSize(module->connections_);
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if (verific_verbose)
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if (verific_verbose)
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log(" importing SVA property at root cell %s (%s) at %s:%d.\n", root->Name(), root->View()->Owner()->Name(),
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log(" importing SVA property at root cell %s (%s) at %s:%d.\n", root->Name(), root->View()->Owner()->Name(),
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LineFile::GetFileName(root->Linefile()), LineFile::GetLineNo(root->Linefile()));
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LineFile::GetFileName(root->Linefile()), LineFile::GetLineNo(root->Linefile()));
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@ -1838,6 +1853,21 @@ struct VerificSvaImporter
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{
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{
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if (importer->mode_sva_continue) {
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if (importer->mode_sva_continue) {
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std::vector<Cell *> remove_cells;
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pool<Wire *> remove_wires;
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for (int i = 0, end = GetSize(module->cells_) - initial_cell_count; i != end; ++i)
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remove_cells.push_back(module->cells_.element(i)->second);
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for (int i = 0, end = GetSize(module->wires_) - initial_wire_count; i != end; ++i)
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remove_wires.emplace(module->wires_.element(i)->second);
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for (auto cell : remove_cells)
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module->remove(cell);
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module->remove(remove_wires);
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module->connections_.resize(initial_connection_count);
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RTLIL::Cell *c = nullptr;
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RTLIL::Cell *c = nullptr;
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if (mode_assert) c = module->addAssert(root_name, State::Sx, State::Sx);
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if (mode_assert) c = module->addAssert(root_name, State::Sx, State::Sx);
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31
tests/verific/sva_continue_on_err_explosion.ys
Normal file
31
tests/verific/sva_continue_on_err_explosion.ys
Normal file
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@ -0,0 +1,31 @@
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verific -sv <<EOF
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module top(input clk, input a, input b);
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prop_supported1: assert property (@(posedge clk) a ##1 b |=> b);
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prop_exploding: assert property (@(posedge clk)
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((a [*7] ##1 b) [*11]) and
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((a [*11] ##1 b) [*7]) and
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((a [*13] ##1 b) [*5]) and
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((a [*5] ##1 b) [*13])
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);
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prop_supported2: assert property (@(posedge clk) a [*5] ##1 b |=> b);
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endmodule
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EOF
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logger -expect warning "Stopping to prevent exponential design size explosion." 1
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verific -import -sva-continue-on-err top
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logger -check-expected
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select -assert-count 3 top/t:$assert
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select -assert-count 1 top/a:unsupported_sva top/prop_exploding %% top/t:$assert %i
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select -assert-count 0 top/a:unsupported_sva top/prop_supported1 %i
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select -assert-count 0 top/a:unsupported_sva top/prop_supported2 %i
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select -assert-count 2 top/prop_supported*
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logger -expect error "uses unsupported SVA constructs." 1
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hierarchy -smtcheck -top top
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logger -check-expected
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