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SigSpec refactoring: using the accessor functions everywhere

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This commit is contained in:
Clifford Wolf 2014-07-22 20:15:14 +02:00
parent 16e5ae0b92
commit 4b4048bc5f
62 changed files with 800 additions and 800 deletions
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2
passes/cmds/connect.cc
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@ -27,7 +27,7 @@ static void unset_drivers(RTLIL::Design *design, RTLIL::Module *module, SigMap &
{
CellTypes ct(design);
RTLIL::Wire *dummy_wire = module->addWire(NEW_ID, sig.__width);
RTLIL::Wire *dummy_wire = module->addWire(NEW_ID, sig.size());
for (auto &it : module->cells)
for (auto &port : it.second->connections)