mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-06 17:44:09 +00:00
Code Activity

optimization, all items should have same attributes

Browse source
This commit is contained in:
Miodrag Milanovic 2020-06-25 09:18:53 +02:00
parent f993d18755
commit 4aec50a863
1 changed files with 1 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
frontends/verific/verific.cc
View file

@ -1112,6 +1112,7 @@ void VerificImporter::import_netlist(RTLIL::Design *design, Netlist *nl, std::se
MapIter mibus; MapIter mibus;
FOREACH_NET_OF_NETBUS(netbus, mibus, net) { FOREACH_NET_OF_NETBUS(netbus, mibus, net) {
import_attributes(wire->attributes, net, nl); import_attributes(wire->attributes, net, nl);
break;
} }
RTLIL::Const initval = Const(State::Sx, GetSize(wire)); RTLIL::Const initval = Const(State::Sx, GetSize(wire));