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added sync reset to ice40 test_ffs.sh

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This commit is contained in:
Clifford Wolf 2015-04-18 09:41:31 +02:00
parent f564a65851
commit 49ef830464
3 changed files with 20 additions and 6 deletions
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17
techlibs/ice40/tests/test_ffs.v
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@ -3,6 +3,7 @@ module test(D, C, E, R, Q);
parameter [0:0] ENABLE_EN = 0;
parameter [0:0] RESET_EN = 0;
parameter [0:0] RESET_VAL = 0;
parameter [0:0] RESET_SYN = 0;
(* gentb_clock *)
input D, C, E, R;
@ -11,7 +12,7 @@ module test(D, C, E, R, Q);
wire gated_reset = R & RESET_EN;
wire gated_enable = E | ~ENABLE_EN;
reg posedge_q, negedge_q;
reg posedge_q, negedge_q, posedge_sq, negedge_sq;
always @(posedge C, posedge gated_reset)
if (gated_reset)
@ -25,5 +26,17 @@ module test(D, C, E, R, Q);
else if (gated_enable)
negedge_q <= D;
assign Q = CLKPOL ? posedge_q : negedge_q;
always @(posedge C)
if (gated_reset)
posedge_sq <= RESET_VAL;
else if (gated_enable)
posedge_sq <= D;
always @(negedge C)
if (gated_reset)
negedge_sq <= RESET_VAL;
else if (gated_enable)
negedge_sq <= D;
assign Q = RESET_SYN ? (CLKPOL ? posedge_sq : negedge_sq) : (CLKPOL ? posedge_q : negedge_q);
endmodule