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Pass SigBit by value to Netlist algorithms

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This commit is contained in:
Bogdan Vukobratovic 2019-06-13 15:42:45 +02:00
parent d69989b8d2
commit 4912567cbf
1 changed files with 76 additions and 57 deletions
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133
kernel/algo.h
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@ -74,25 +74,43 @@ struct Netlist {
namespace detail namespace detail
{ {
struct NetlistConeWireIter : public std::iterator<std::input_iterator_tag, const RTLIL::SigBit *> { struct NetlistConeWireIter : public std::iterator<std::input_iterator_tag, RTLIL::SigBit> {
using set_iter_t = std::set<RTLIL::SigBit>::iterator; using set_iter_t = std::set<RTLIL::SigBit>::iterator;
const Netlist &net; const Netlist &net;
const RTLIL::SigBit *p_sig; RTLIL::SigBit sig;
bool sentinel;
std::stack<std::pair<set_iter_t, set_iter_t>> dfs_path_stack; std::stack<std::pair<set_iter_t, set_iter_t>> dfs_path_stack;
std::set<RTLIL::Cell *> cells_visited; std::set<RTLIL::Cell *> cells_visited;
NetlistConeWireIter(const Netlist &net, const RTLIL::SigBit *p_sig = NULL) : net(net), p_sig(p_sig) {} NetlistConeWireIter(const Netlist &net) : net(net), sentinel(true) {}
const RTLIL::SigBit &operator*() const { return *p_sig; }; NetlistConeWireIter(const Netlist &net, RTLIL::SigBit sig) : net(net), sig(sig), sentinel(false) {}
bool operator!=(const NetlistConeWireIter &other) const { return p_sig != other.p_sig; }
bool operator==(const NetlistConeWireIter &other) const { return p_sig == other.p_sig; } const RTLIL::SigBit &operator*() const { return sig; };
bool operator!=(const NetlistConeWireIter &other) const
{
if (sentinel || other.sentinel) {
return sentinel != other.sentinel;
} else {
return sig != other.sig;
}
}
bool operator==(const NetlistConeWireIter &other) const {
if (sentinel || other.sentinel) {
return sentinel == other.sentinel;
} else {
return sig == other.sig;
}
}
void next_sig_in_dag() void next_sig_in_dag()
{ {
while (1) { while (1) {
if (dfs_path_stack.empty()) { if (dfs_path_stack.empty()) {
p_sig = NULL; sentinel = true;
return; return;
} }
@ -101,7 +119,7 @@ struct NetlistConeWireIter : public std::iterator<std::input_iterator_tag, const
cell_inputs_iter++; cell_inputs_iter++;
if (cell_inputs_iter != cell_inputs_iter_guard) { if (cell_inputs_iter != cell_inputs_iter_guard) {
p_sig = &(*cell_inputs_iter); sig = *cell_inputs_iter;
return; return;
} else { } else {
dfs_path_stack.pop(); dfs_path_stack.pop();
@ -111,14 +129,14 @@ struct NetlistConeWireIter : public std::iterator<std::input_iterator_tag, const
NetlistConeWireIter &operator++() NetlistConeWireIter &operator++()
{ {
if (net.sigbit_driver_map.count(*p_sig)) { if (net.sigbit_driver_map.count(sig)) {
auto drv = net.sigbit_driver_map.at(*p_sig); auto drv = net.sigbit_driver_map.at(sig);
if (!cells_visited.count(drv)) { if (!cells_visited.count(drv)) {
auto &inputs = net.cell_inputs_map.at(drv); auto &inputs = net.cell_inputs_map.at(drv);
dfs_path_stack.push(std::make_pair(inputs.begin(), inputs.end())); dfs_path_stack.push(std::make_pair(inputs.begin(), inputs.end()));
cells_visited.insert(drv); cells_visited.insert(drv);
p_sig = &(*dfs_path_stack.top().first); sig = (*dfs_path_stack.top().first);
} else { } else {
next_sig_in_dag(); next_sig_in_dag();
} }
@ -131,23 +149,24 @@ struct NetlistConeWireIter : public std::iterator<std::input_iterator_tag, const
struct NetlistConeWireIterable { struct NetlistConeWireIterable {
const Netlist &net; const Netlist &net;
const RTLIL::SigBit *p_sig; RTLIL::SigBit sig;
NetlistConeWireIterable(const Netlist &net, const RTLIL::SigBit *p_sig) : net(net), p_sig(p_sig) {} NetlistConeWireIterable(const Netlist &net, RTLIL::SigBit sig) : net(net), sig(sig) {}
NetlistConeWireIter begin() { return NetlistConeWireIter(net, p_sig); } NetlistConeWireIter begin() { return NetlistConeWireIter(net, sig); }
NetlistConeWireIter end() { return NetlistConeWireIter(net); } NetlistConeWireIter end() { return NetlistConeWireIter(net); }
}; };
struct NetlistConeCellIter : public std::iterator<std::input_iterator_tag, const RTLIL::Cell *> { struct NetlistConeCellIter : public std::iterator<std::input_iterator_tag, RTLIL::Cell *> {
const Netlist &net; const Netlist &net;
const RTLIL::SigBit *p_sig;
NetlistConeWireIter sig_iter; NetlistConeWireIter sig_iter;
NetlistConeCellIter(const Netlist &net, const RTLIL::SigBit *p_sig = NULL) : net(net), p_sig(p_sig), sig_iter(net, p_sig) NetlistConeCellIter(const Netlist &net) : net(net), sig_iter(net) {}
NetlistConeCellIter(const Netlist &net, RTLIL::SigBit sig) : net(net), sig_iter(net, sig)
{ {
if ((p_sig != NULL) && (!has_driver_cell(*sig_iter))) { if ((!sig_iter.sentinel) && (!has_driver_cell(*sig_iter))) {
++(*this); ++(*this);
} }
} }
@ -162,7 +181,7 @@ struct NetlistConeCellIter : public std::iterator<std::input_iterator_tag, const
{ {
while (true) { while (true) {
++sig_iter; ++sig_iter;
if (sig_iter.p_sig == NULL) { if (sig_iter.sentinel) {
return *this; return *this;
} }
@ -179,60 +198,60 @@ struct NetlistConeCellIter : public std::iterator<std::input_iterator_tag, const
struct NetlistConeCellIterable { struct NetlistConeCellIterable {
const Netlist &net; const Netlist &net;
const RTLIL::SigBit *p_sig; RTLIL::SigBit sig;
NetlistConeCellIterable(const Netlist &net, const RTLIL::SigBit *p_sig) : net(net), p_sig(p_sig) {} NetlistConeCellIterable(const Netlist &net, RTLIL::SigBit sig) : net(net), sig(sig) {}
NetlistConeCellIter begin() { return NetlistConeCellIter(net, p_sig); } NetlistConeCellIter begin() { return NetlistConeCellIter(net, sig); }
NetlistConeCellIter end() { return NetlistConeCellIter(net); } NetlistConeCellIter end() { return NetlistConeCellIter(net); }
}; };
struct NetlistConeInputsIter : public std::iterator<std::input_iterator_tag, const RTLIL::Cell *> { // struct NetlistConeInputsIter : public std::iterator<std::input_iterator_tag, const RTLIL::Cell *> {
const Netlist &net; // const Netlist &net;
const RTLIL::SigBit *p_sig; // RTLIL::SigBit sig;
NetlistConeWireIter sig_iter; // NetlistConeWireIter sig_iter;
bool has_driver_cell(const RTLIL::SigBit &s) { return net.sigbit_driver_map.count(s); } // bool has_driver_cell(const RTLIL::SigBit &s) { return net.sigbit_driver_map.count(s); }
NetlistConeInputsIter(const Netlist &net, const RTLIL::SigBit *p_sig = NULL) : net(net), p_sig(p_sig), sig_iter(net, p_sig) // NetlistConeInputsIter(const Netlist &net, RTLIL::SigBit sig = NULL) : net(net), sig(sig), sig_iter(net, sig)
{ // {
if ((p_sig != NULL) && (has_driver_cell(*sig_iter))) { // if ((sig != NULL) && (has_driver_cell(sig_iter))) {
++(*this); // ++(*this);
} // }
} // }
const RTLIL::SigBit &operator*() const { return *sig_iter; }; // const RTLIL::SigBit &operator*() const { return sig_iter; };
bool operator!=(const NetlistConeInputsIter &other) const { return sig_iter != other.sig_iter; } // bool operator!=(const NetlistConeInputsIter &other) const { return sig_iter != other.sig_iter; }
bool operator==(const NetlistConeInputsIter &other) const { return sig_iter == other.sig_iter; } // bool operator==(const NetlistConeInputsIter &other) const { return sig_iter == other.sig_iter; }
NetlistConeInputsIter &operator++() // NetlistConeInputsIter &operator++()
{ // {
do { // do {
++sig_iter; // ++sig_iter;
if (sig_iter.p_sig == NULL) { // if (sig_iter->empty()) {
return *this; // return *this;
} // }
} while (has_driver_cell(*sig_iter)); // } while (has_driver_cell(sig_iter));
return *this; // return *this;
} // }
}; // };
struct NetlistConeInputsIterable { // struct NetlistConeInputsIterable {
const Netlist &net; // const Netlist &net;
const RTLIL::SigBit *p_sig; // RTLIL::SigBit sig;
NetlistConeInputsIterable(const Netlist &net, const RTLIL::SigBit *p_sig) : net(net), p_sig(p_sig) {} // NetlistConeInputsIterable(const Netlist &net, RTLIL::SigBit sig) : net(net), sig(sig) {}
NetlistConeInputsIter begin() { return NetlistConeInputsIter(net, p_sig); } // NetlistConeInputsIter begin() { return NetlistConeInputsIter(net, sig); }
NetlistConeInputsIter end() { return NetlistConeInputsIter(net); } // NetlistConeInputsIter end() { return NetlistConeInputsIter(net); }
}; // };
} // namespace detail } // namespace detail
detail::NetlistConeWireIterable cone(const Netlist &net, const RTLIL::SigBit &sig) { return detail::NetlistConeWireIterable(net, &sig); } detail::NetlistConeWireIterable cone(const Netlist &net, RTLIL::SigBit sig) { return detail::NetlistConeWireIterable(net, net.sigmap(sig)); }
// detail::NetlistConeInputsIterable cone_inputs(const RTLIL::SigBit &sig) { return NetlistConeInputsIterable(this, &sig); } // detail::NetlistConeInputsIterable cone_inputs(RTLIL::SigBit sig) { return NetlistConeInputsIterable(this, &sig); }
detail::NetlistConeCellIterable cell_cone(const Netlist &net, const RTLIL::SigBit &sig) { return detail::NetlistConeCellIterable(net, &sig); } detail::NetlistConeCellIterable cell_cone(const Netlist &net, RTLIL::SigBit sig) { return detail::NetlistConeCellIterable(net, net.sigmap(sig)); }
YOSYS_NAMESPACE_END YOSYS_NAMESPACE_END