From 48f358bb09b18fe44d99ded610fd889341472088 Mon Sep 17 00:00:00 2001
From: Krystine Sherwin <93062060+KrystalDelusion@users.noreply.github.com>
Date: Sat, 17 Aug 2024 11:33:28 +1200
Subject: [PATCH] Docs: Update example_synth

We can now fake the `yosys> flatten;;` line, so we no longer need to explain the split flatten/clean.
---
 docs/source/code_examples/fifo/fifo.out       |  7 ++++---
 docs/source/code_examples/fifo/fifo.ys        |  3 +++
 docs/source/getting_started/example_synth.rst | 11 ++---------
 3 files changed, 9 insertions(+), 12 deletions(-)

diff --git a/docs/source/code_examples/fifo/fifo.out b/docs/source/code_examples/fifo/fifo.out
index ac132ee6c..31907a741 100644
--- a/docs/source/code_examples/fifo/fifo.out
+++ b/docs/source/code_examples/fifo/fifo.out
@@ -306,14 +306,15 @@ yosys> show -color maroon3 c:fifo_reader -color cornflowerblue @new_cells -notit
 Writing dot description to `rdata_proc.dot'.
 Dumping selected parts of module fifo to page 1.
 
-yosys> flatten
+yosys> echo off
+echo off
+yosys> flatten;;
 
 15. Executing FLATTEN pass (flatten design).
 Deleting now unused module $paramod\addr_gen\MAX_DATA=s32'00000000000000000000000100000000.
 <suppressed ~2 debug messages>
-
-yosys> clean
 Removed 3 unused cells and 25 unused wires.
+echo on
 
 yosys> select -set rdata_path o:rdata %ci*
 
diff --git a/docs/source/code_examples/fifo/fifo.ys b/docs/source/code_examples/fifo/fifo.ys
index 57a28e63e..c4ea9f9bd 100644
--- a/docs/source/code_examples/fifo/fifo.ys
+++ b/docs/source/code_examples/fifo/fifo.ys
@@ -39,7 +39,10 @@ show -color maroon3 c:fifo_reader -color cornflowerblue @new_cells -notitle -for
 
 # ========================================================
 
+echo off
+log "yosys> flatten;;"
 flatten;;
+echo on
 select -set rdata_path o:rdata %ci*
 select -set new_cells @rdata_path o:rdata %ci3 %d i:* %d
 show -color maroon3 @new_cells -notitle -format dot -prefix rdata_flat @rdata_path
diff --git a/docs/source/getting_started/example_synth.rst b/docs/source/getting_started/example_synth.rst
index ae0a9a366..04133f9a9 100644
--- a/docs/source/getting_started/example_synth.rst
+++ b/docs/source/getting_started/example_synth.rst
@@ -292,8 +292,8 @@ optimizations between modules which would otherwise be missed.  Let's run
 
 .. literalinclude:: /code_examples/fifo/fifo.out
    :language: doscon
-   :start-at: yosys> flatten
-   :end-before: yosys> select
+   :start-at: yosys> flatten;;
+   :end-before: echo on
    :name: flat_clean
    :caption: output of :yoscrypt:`flatten;;`
 
@@ -313,13 +313,6 @@ and merged with the ``raddr`` wire feeding into the ``$memrd`` cell.  This wire
 merging happened during the call to :cmd:ref:`clean` which we can see in the
 :ref:`flat_clean`.
 
-.. note:: 
-
-   :cmd:ref:`flatten` and :cmd:ref:`clean` would normally be combined into a
-   single :yoterm:`yosys> flatten;;` output, but they appear separately here as
-   a side effect of using :cmd:ref:`echo` for generating the terminal style
-   output.
-
 Depending on the target architecture, this stage of synthesis might also see
 commands such as :cmd:ref:`tribuf` with the ``-logic`` option and
 :cmd:ref:`deminout`.  These remove tristate and inout constructs respectively,