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Hit parser limit with 3M gate design. This commit fix it.
This commit is contained in:
Kaj Tuomi 2019-05-18 14:20:30 +03:00
parent b6345b111d
commit 48ddbe52fb
1 changed files with 1 additions and 1 deletions
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frontends/verilog/Makefile.inc
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@ -14,7 +14,7 @@ frontends/verilog/verilog_lexer.cc: frontends/verilog/verilog_lexer.l
$(Q) mkdir -p $(dir $@)
$(P) flex -o frontends/verilog/verilog_lexer.cc $<
frontends/verilog/verilog_parser.tab.o: CXXFLAGS += -DYYMAXDEPTH=100000
frontends/verilog/verilog_parser.tab.o: CXXFLAGS += -DYYMAXDEPTH=10000000
OBJS += frontends/verilog/verilog_parser.tab.o
OBJS += frontends/verilog/verilog_lexer.o