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Initial work on greenpak4 counter extraction. Doesn't work but a decent start

This commit is contained in:
Andrew Zonenberg 2016-03-30 01:07:20 -07:00
parent 3ea6026648
commit 489caf32c5
3 changed files with 248 additions and 0 deletions

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@ -91,6 +91,33 @@ module GP_COUNT8(input CLK, input wire RST, output reg OUT);
parameter CLKIN_DIVIDE = 1;
//more complex hard IP blocks are not supported for simulation yet
reg[7:0] count = COUNT_TO;
//Combinatorially output whenever we wrap low
always @(*) begin
OUT <= (count == 8'h0);
end
//datasheet is unclear but experimental testing confirms that POR value is COUNT_TO.
//Reset value is clearly 0 except in count/FSM cells where it's configurable.
//Datasheet seems to indicate that reset is asynchronous, but for now we model as sync due to Yosys issues...
always @(posedge CLK) begin
count <= count - 1'd1;
if(count == 0)
count <= COUNT_MAX;
/*
if((RESET_MODE == "RISING") && RST)
count <= 0;
if((RESET_MODE == "FALLING") && !RST)
count <= 0;
if((RESET_MODE == "BITH") && RST)
count <= 0;
*/
end
endmodule