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Added abc -dff and -clk support

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This commit is contained in:
Clifford Wolf 2013-12-31 21:25:09 +01:00
parent b3b00f1bf4
commit 4892a3ce6d
3 changed files with 173 additions and 34 deletions
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28
passes/abc/blifparse.cc
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@ -44,7 +44,7 @@ static bool read_next_line(char *buffer, int &line_count, FILE *f)
}
}
RTLIL::Design *abc_parse_blif(FILE *f)
RTLIL::Design *abc_parse_blif(FILE *f, std::string dff_name)
{
RTLIL::Design *design = new RTLIL::Design;
RTLIL::Module *module = new RTLIL::Module;
@ -101,6 +101,32 @@ RTLIL::Design *abc_parse_blif(FILE *f)
continue;
}
if (!strcmp(cmd, ".latch"))
{
char *d = strtok(NULL, " \t\r\n");
char *q = strtok(NULL, " \t\r\n");
if (module->wires.count(RTLIL::escape_id(d)) == 0) {
RTLIL::Wire *wire = new RTLIL::Wire;
wire->name = RTLIL::escape_id(d);
module->add(wire);
}
if (module->wires.count(RTLIL::escape_id(q)) == 0) {
RTLIL::Wire *wire = new RTLIL::Wire;
wire->name = RTLIL::escape_id(q);
module->add(wire);
}
RTLIL::Cell *cell = new RTLIL::Cell;
cell->name = NEW_ID;
cell->type = dff_name;
cell->connections["\\D"] = module->wires.at(RTLIL::escape_id(d));
cell->connections["\\Q"] = module->wires.at(RTLIL::escape_id(q));
module->add(cell);
continue;
}
if (!strcmp(cmd, ".gate"))
{
RTLIL::Cell *cell = new RTLIL::Cell;