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Removed left over debug code
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2 changed files with 0 additions and 2 deletions
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@ -917,7 +917,6 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint, bool sign_hint)
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children[0]->children[1]->clone() : children[0]->children[0]->clone());
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fake_ast->children[0]->delete_children();
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RTLIL::SigSpec shift_val = fake_ast->children[1]->genRTLIL();
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log_dump(width, shift_val, id2ast->range_swapped, source_width, id2ast->range_left, id2ast->range_right);
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if (id2ast->range_right != 0)
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shift_val = current_module->Sub(NEW_ID, shift_val, id2ast->range_right);
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if (id2ast->range_swapped)
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