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Added read_verilog -sv options, added support for bit, logic,

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allways_ff, always_comb, and always_latch
This commit is contained in:
Clifford Wolf 2014-06-12 11:54:20 +02:00
parent 9a6cd64fc2
commit 482d9208aa
7 changed files with 52 additions and 8 deletions
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2
tests/sat/asserts.ys
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@ -1,3 +1,3 @@
read_verilog asserts.v
read_verilog -sv asserts.v
hierarchy; proc; opt
sat -verify -seq 1 -set-at 1 rst 1 -tempinduct -prove-asserts

2
tests/sat/asserts_seq.ys
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@ -1,4 +1,4 @@
read_verilog asserts_seq.v
read_verilog -sv asserts_seq.v
hierarchy; proc; opt
sat -verify -prove-asserts -tempinduct -seq 1 test_001