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abc9_ops -prep_times: generate flop boxes from abc9_required attr

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This commit is contained in:
Eddie Hung 2020-01-10 14:49:52 -08:00
parent e0af812180
commit 475d983676
2 changed files with 67 additions and 78 deletions
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61
techlibs/xilinx/abc9_xc7.box
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@ -62,67 +62,6 @@ $__ABC9_ASYNC1 1001 1 2 1
#A S
0 764 # Y
# Flop boxes:
# * Max delays from https://github.com/SymbiFlow/prjxray-db/blob/23c8b0851f979f0799318eaca90174413a46b257/artix7/timings/slicel.sdf#L237-L251
# https://github.com/SymbiFlow/prjxray-db/blob/23c8b0851f979f0799318eaca90174413a46b257/artix7/timings/slicel.sdf#L265-L277
# * Exception: $abc9_currQ is a special input (located last) necessary for clock-enable functionality
# Box 1100 : FDRE
# name ID w/b ins outs
FDRE 1100 1 5 1
#C CE D R $abc9_currQ
#0 109 -46 404 0
0 109 0 404 0 # Q (-46ps Tsu clamped to 0)
# Box 1101 : FDRE_1
# name ID w/b ins outs
FDRE_1 1101 1 5 1
#C CE D R $abc9_currQ
#0 109 -46 404 0
0 109 0 404 0 # Q (-46ps Tsu clamped to 0)
# Box 1102 : FDSE
# name ID w/b ins outs
FDSE 1102 1 5 1
#C CE D R $abc9_currQ
#0 109 -46 404 0
0 109 0 404 0 # Q (-46ps Tsu clamped to 0)
# Box 1103 : FDSE_1
# name ID w/b ins outs
FDSE_1 1103 1 5 1
#C CE D R $abc9_currQ
#0 109 -46 404 0
0 109 0 404 0 # Q (-46ps Tsu clamped to 0)
# Box 1104 : FDCE
# name ID w/b ins outs
FDCE 1104 1 5 1
#C CE CLR D $abc9_currQ
#0 109 764 -46 0
0 109 764 0 0 # Q (-46ps Tsu clamped to 0)
# Box 1105 : FDCE_1
# name ID w/b ins outs
FDCE_1 1105 1 5 1
#C CE CLR D $abc9_currQ
#0 109 764 -46 0
0 109 764 0 0 # Q (-46ps Tsu clamped to 0)
# Box 1106 : FDPE
# name ID w/b ins outs
FDPE 1106 1 5 1
#C CE D PRE $abc9_currQ
#0 109 -46 764 0
0 109 0 764 0 # Q (-46ps Tsu clamped to 0)
# Box 1107 : FDPE_1
# name ID w/b ins outs
FDPE_1 1107 1 5 1
#C CE D PRE $abc9_currQ
#0 109 -46 764 0
0 109 0 764 0 # Q (-46ps Tsu clamped to 0)
# Box 2000 : $__ABC9_LUT6
# (private cell to emulate async behaviour of LUTRAMs)
# SLICEM/A6LUT