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Renamed SIZE() to GetSize() because of name collision on Win32
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parent
c7f5aab625
commit
4569a747f8
48 changed files with 447 additions and 447 deletions
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@ -229,9 +229,9 @@ void rmunused_module_signals(RTLIL::Module *module, bool purge_mode, bool verbos
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if (!used_signals.check_any(s2) && wire->port_id == 0 && !wire->get_bool_attribute("\\keep")) {
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maybe_del_wires.push_back(wire);
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} else {
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log_assert(SIZE(s1) == SIZE(s2));
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log_assert(GetSize(s1) == GetSize(s2));
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RTLIL::SigSig new_conn;
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for (int i = 0; i < SIZE(s1); i++)
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for (int i = 0; i < GetSize(s1); i++)
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if (s1[i] != s2[i]) {
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new_conn.first.append_bit(s1[i]);
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new_conn.second.append_bit(s2[i]);
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@ -250,7 +250,7 @@ void rmunused_module_signals(RTLIL::Module *module, bool purge_mode, bool verbos
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RTLIL::SigSpec sig = assign_map(RTLIL::SigSpec(wire));
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if (!used_signals_nodrivers.check_any(sig)) {
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std::string unused_bits;
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for (int i = 0; i < SIZE(sig); i++) {
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for (int i = 0; i < GetSize(sig); i++) {
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if (sig[i].wire == NULL)
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continue;
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if (!used_signals_nodrivers.check(sig[i])) {
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@ -299,7 +299,7 @@ void rmunused_module(RTLIL::Module *module, bool purge_mode, bool verbose)
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bool is_signed = cell->type == "$pos" && cell->getParam("\\A_SIGNED").as_bool();
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RTLIL::SigSpec a = cell->getPort("\\A");
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RTLIL::SigSpec y = cell->getPort("\\Y");
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a.extend_u0(SIZE(y), is_signed);
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a.extend_u0(GetSize(y), is_signed);
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module->connect(y, a);
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delcells.push_back(cell);
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}
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