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Added Xilinx bram black-box modules

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This commit is contained in:
Clifford Wolf 2015-04-06 08:44:30 +02:00
parent c0e2b3eb11
commit 4389d9306e
3 changed files with 322 additions and 0 deletions
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techlibs/xilinx/Makefile.inc
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@ -5,5 +5,6 @@ $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/cells_map.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/cells_sim.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/brams.txt))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/brams_map.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/brams_bb.v))
$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/arith_map.v))