3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-07-26 22:17:55 +00:00

kernel: SigSpec use more const& + overloads to prevent implicit SigSpec

This commit is contained in:
Eddie Hung 2020-03-13 08:17:39 -07:00
parent b567f03c26
commit 432a09af80
14 changed files with 96 additions and 82 deletions

View file

@ -906,8 +906,8 @@ struct TechmapWorker
RTLIL::SigSig port_conn;
for (auto &it : port_connmap) {
port_conn.first.append_bit(it.first);
port_conn.second.append_bit(it.second);
port_conn.first.append(it.first);
port_conn.second.append(it.second);
}
tpl->connect(port_conn);