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kernel: SigSpec use more const& + overloads to prevent implicit SigSpec

This commit is contained in:
Eddie Hung 2020-03-13 08:17:39 -07:00
parent b567f03c26
commit 432a09af80
14 changed files with 96 additions and 82 deletions

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@ -193,11 +193,11 @@ bool group_cell_inputs(RTLIL::Module *module, RTLIL::Cell *cell, bool commutativ
for (auto &it : grouped_bits[i]) {
for (auto &bit : it.second) {
new_conn.first.append_bit(bit);
new_conn.second.append_bit(RTLIL::SigBit(new_y, new_a.size()));
new_conn.first.append(bit);
new_conn.second.append(RTLIL::SigBit(new_y, new_a.size()));
}
new_a.append_bit(it.first.first);
new_b.append_bit(it.first.second);
new_a.append(it.first.first);
new_b.append(it.first.second);
}
if (cell->type.in(ID($and), ID($or)) && i == GRP_CONST_A) {