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Merge pull request #1501 from YosysHQ/dave/mem_copy_attr
memory_collect: Copy attr from RTLIL::Memory to cell
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@ -218,6 +218,10 @@ Cell *handle_memory(Module *module, RTLIL::Memory *memory)
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mem->setPort("\\RD_DATA", sig_rd_data);
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mem->setPort("\\RD_DATA", sig_rd_data);
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mem->setPort("\\RD_EN", sig_rd_en);
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mem->setPort("\\RD_EN", sig_rd_en);
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// Copy attributes from RTLIL memory to $mem
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for (auto attr : memory->attributes)
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mem->attributes[attr.first] = attr.second;
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for (auto c : memcells)
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for (auto c : memcells)
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module->remove(c);
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module->remove(c);
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