mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-06 17:44:09 +00:00
Code Activity

Merge pull request #3625 from povik/show_cleanup

Browse source
This commit is contained in:
N. Engelhardt 2023-02-06 16:11:26 +01:00 committed by GitHub
parent 45edc8eb98 f9e30ee5e0
commit 417fadbefd
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
1 changed files with 82 additions and 56 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

138
passes/cmds/show.cc
View file

@ -233,76 +233,101 @@ struct ShowWorker
return std::string(); return std::string();
} }
// Return the pieces of a label joined by a '|' separator
std::string join_label_pieces(std::vector<std::string> pieces)
{
std::string ret = "";
bool first_piece = true;
for (auto &piece : pieces) {
if (!first_piece)
ret += "|";
ret += piece;
first_piece = false;
}
return ret;
}
std::string gen_portbox(std::string port, RTLIL::SigSpec sig, bool driver, std::string *node = nullptr) std::string gen_portbox(std::string port, RTLIL::SigSpec sig, bool driver, std::string *node = nullptr)
{ {
std::string code; std::string code;
std::string net = gen_signode_simple(sig); std::string net = gen_signode_simple(sig);
if (net.empty()) if (net.empty())
{ {
std::string label_string; int dot_idx = single_idx_count++;
int pos = sig.size()-1; std::vector<std::string> label_pieces;
int idx = single_idx_count++; int bitpos = sig.size()-1;
for (int rep, i = int(sig.chunks().size())-1; i >= 0; i -= rep) {
const RTLIL::SigChunk &c = sig.chunks().at(i); for (int rep, chunk_idx = ((int) sig.chunks().size()) - 1; chunk_idx >= 0; chunk_idx -= rep) {
const RTLIL::SigChunk &c = sig.chunks().at(chunk_idx);
// Find the number of times this chunk is repeating
for (rep = 1; chunk_idx - rep >= 0 && c == sig.chunks().at(chunk_idx - rep); rep++);
int cl, cr; int cl, cr;
if (c.wire) { cl = c.offset + c.width - 1;
cr = c.offset;
if (c.is_wire()) {
if (c.wire->upto) { if (c.wire->upto) {
cr = c.wire->start_offset + (c.wire->width - c.offset - 1); cr = (c.wire->width - 1) - c.offset;
cl = cr - (c.width - 1); cl = cr - (c.width - 1);
} else {
cr = c.wire->start_offset + c.offset;
cl = cr + c.width - 1;
} }
} else {
cl = c.offset + c.width - 1; cl += c.wire->start_offset;
cr = c.offset; cr += c.wire->start_offset;
} }
if (!driver && c.wire == nullptr) {
RTLIL::State s1 = c.data.front(); // Is this chunk a constant filled with one kind of bit state?
for (auto s2 : c.data) bool no_signode = !driver && !c.is_wire() \
if (s1 != s2) && std::equal(c.data.begin() + 1, c.data.end(), c.data.begin());
goto not_const_stream;
net.clear(); if (!no_signode) {
} else {
not_const_stream:
net = gen_signode_simple(c, false); net = gen_signode_simple(c, false);
log_assert(!net.empty()); log_assert(!net.empty());
} }
for (rep = 1; i-rep >= 0 && c == sig.chunks().at(i-rep); rep++) {}
std::string repinfo = rep > 1 ? stringf("%dx ", rep) : ""; std::string repinfo = rep > 1 ? stringf("%dx ", rep) : "";
std::string portside = stringf("%d:%d", bitpos, bitpos - rep*c.width + 1);
std::string remoteside = stringf("%s%d:%d", repinfo.c_str(), cl, cr);
if (driver) { if (driver) {
log_assert(!net.empty()); log_assert(!net.empty());
label_string += stringf("<s%d> %d:%d - %s%d:%d |", i, pos, pos-c.width+1, repinfo.c_str(), cl, cr); label_pieces.push_back(stringf("<s%d> %s - %s ", chunk_idx, portside.c_str(), remoteside.c_str()));
net_conn_map[net].in.insert({stringf("x%d:s%d", idx, i), rep*c.width}); net_conn_map[net].in.insert({stringf("x%d:s%d", dot_idx, chunk_idx), rep*c.width});
net_conn_map[net].color = nextColor(c, net_conn_map[net].color); net_conn_map[net].color = nextColor(c, net_conn_map[net].color);
} else
if (net.empty()) {
log_assert(rep == 1);
label_string += stringf("%c -&gt; %d:%d |",
c.data.front() == State::S0 ? '0' :
c.data.front() == State::S1 ? '1' :
c.data.front() == State::Sx ? 'X' :
c.data.front() == State::Sz ? 'Z' : '?',
pos, pos-rep*c.width+1);
} else { } else {
label_string += stringf("<s%d> %s%d:%d - %d:%d |", i, repinfo.c_str(), cl, cr, pos, pos-rep*c.width+1); if (no_signode) {
net_conn_map[net].out.insert({stringf("x%d:s%d", idx, i), rep*c.width}); log_assert(rep == 1);
net_conn_map[net].color = nextColor(c, net_conn_map[net].color); label_pieces.push_back(stringf("%c -&gt; %d:%d ",
c.data.front() == State::S0 ? '0' :
c.data.front() == State::S1 ? '1' :
c.data.front() == State::Sx ? 'X' :
c.data.front() == State::Sz ? 'Z' : '?',
bitpos, bitpos-rep*c.width+1));
} else {
label_pieces.push_back(stringf("<s%d> %s - %s ", chunk_idx, remoteside.c_str(), portside.c_str()));
net_conn_map[net].out.insert({stringf("x%d:s%d", dot_idx, chunk_idx), rep*c.width});
net_conn_map[net].color = nextColor(c, net_conn_map[net].color);
}
} }
pos -= rep * c.width;
bitpos -= rep * c.width;
} }
if (label_string[label_string.size()-1] == '|')
label_string = label_string.substr(0, label_string.size()-1); code += stringf("x%d [ shape=record, style=rounded, label=\"", dot_idx) \
code += stringf("x%d [ shape=record, style=rounded, label=\"%s\" ];\n", idx, label_string.c_str()); + join_label_pieces(label_pieces) + "\" ];\n";
if (!port.empty()) { if (!port.empty()) {
currentColor = xorshift32(currentColor); currentColor = xorshift32(currentColor);
if (driver) if (driver)
code += stringf("%s:e -> x%d:w [arrowhead=odiamond, arrowtail=odiamond, dir=both, %s, %s];\n", port.c_str(), idx, nextColor(sig).c_str(), widthLabel(sig.size()).c_str()); code += stringf("%s:e -> x%d:w [arrowhead=odiamond, arrowtail=odiamond, dir=both, %s, %s];\n", port.c_str(), dot_idx, nextColor(sig).c_str(), widthLabel(sig.size()).c_str());
else else
code += stringf("x%d:e -> %s:w [arrowhead=odiamond, arrowtail=odiamond, dir=both, %s, %s];\n", idx, port.c_str(), nextColor(sig).c_str(), widthLabel(sig.size()).c_str()); code += stringf("x%d:e -> %s:w [arrowhead=odiamond, arrowtail=odiamond, dir=both, %s, %s];\n", dot_idx, port.c_str(), nextColor(sig).c_str(), widthLabel(sig.size()).c_str());
} }
if (node != nullptr) if (node != nullptr)
*node = stringf("x%d", idx); *node = stringf("x%d", dot_idx);
} }
else else
{ {
@ -417,6 +442,7 @@ struct ShowWorker
for (auto cell : module->selected_cells()) for (auto cell : module->selected_cells())
{ {
std::vector<RTLIL::IdString> in_ports, out_ports; std::vector<RTLIL::IdString> in_ports, out_ports;
std::vector<std::string> in_label_pieces, out_label_pieces;
for (auto &conn : cell->connections()) { for (auto &conn : cell->connections()) {
if (!ct.cell_output(cell->type, conn.first)) if (!ct.cell_output(cell->type, conn.first))
@ -428,23 +454,23 @@ struct ShowWorker
std::sort(in_ports.begin(), in_ports.end(), RTLIL::sort_by_id_str()); std::sort(in_ports.begin(), in_ports.end(), RTLIL::sort_by_id_str());
std::sort(out_ports.begin(), out_ports.end(), RTLIL::sort_by_id_str()); std::sort(out_ports.begin(), out_ports.end(), RTLIL::sort_by_id_str());
std::string label_string = "{{"; for (auto &p : in_ports) {
bool signed_suffix = genSignedLabels && cell->hasParam(p.str() + "_SIGNED")
&& cell->getParam(p.str() + "_SIGNED").as_bool();
for (auto &p : in_ports) in_label_pieces.push_back(stringf("<p%d> %s%s", id2num(p), escape(p.str()),
label_string += stringf("<p%d> %s%s|", id2num(p), escape(p.str()), signed_suffix ? "*" : ""));
genSignedLabels && cell->hasParam(p.str() + "_SIGNED") && }
cell->getParam(p.str() + "_SIGNED").as_bool() ? "*" : "");
if (label_string[label_string.size()-1] == '|')
label_string = label_string.substr(0, label_string.size()-1);
label_string += stringf("}|%s\\n%s|{", findLabel(cell->name.str()), escape(cell->type.str()));
for (auto &p : out_ports) for (auto &p : out_ports)
label_string += stringf("<p%d> %s|", id2num(p), escape(p.str())); out_label_pieces.push_back(stringf("<p%d> %s", id2num(p), escape(p.str())));
if (label_string[label_string.size()-1] == '|')
label_string = label_string.substr(0, label_string.size()-1);
label_string += "}}"; std::string in_label = join_label_pieces(in_label_pieces);
std::string out_label = join_label_pieces(out_label_pieces);
std::string label_string = stringf("{{%s}|%s\\n%s|{%s}}", in_label.c_str(),
findLabel(cell->name.str()), escape(cell->type.str()),
out_label.c_str());
std::string code; std::string code;
for (auto &conn : cell->connections()) { for (auto &conn : cell->connections()) {