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Fix CY chaining and CI injection

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This commit is contained in:
Miodrag Milanovic 2024-05-30 17:29:33 +02:00
parent 596506b88b
commit 40f05009e3
2 changed files with 67 additions and 4 deletions
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63
tests/arch/nanoxplore/add_sub.ys
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@ -1,10 +1,71 @@
read_verilog ../common/add_sub.v
hierarchy -top top
proc
equiv_opt -assert -map +/nanoxplore/cells_sim.v synth_nanoxplore # equivalency check
equiv_opt -run :prove -map +/nanoxplore/cells_sim.v -map +/nanoxplore/cells_sim_u.v synth_nanoxplore
opt -full
miter -equiv -flatten -make_assert -make_outputs gold gate miter
sat -verify -prove-asserts -seq 3 -set-init-zero -show-inputs -show-outputs miter
design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
cd top # Constrain all select calls below inside the top module
select -assert-count 2 t:NX_CY
select -assert-count 4 t:NX_LUT
select -assert-none t:NX_CY t:NX_LUT %% t:* %D
design -reset
read_verilog <<EOT
module top
(
input [5:0] x,
input [5:0] y,
output [5:0] A,
input CI,
output CO
);
assign {CO, A} = x + y + CI;
endmodule
EOT
hierarchy -top top
proc
equiv_opt -run :prove -map +/nanoxplore/cells_sim.v -map +/nanoxplore/cells_sim_u.v synth_nanoxplore
opt -full
miter -equiv -flatten -make_assert -make_outputs gold gate miter
sat -verify -prove-asserts -seq 3 -set-init-zero -show-inputs -show-outputs miter
design -load postopt
cd top
stat
select -assert-count 2 t:NX_CY
select -assert-none t:NX_CY %% t:* %D
design -reset
read_verilog <<EOT
module top
(
input [189:0] x,
input [189:0] y,
output [189:0] A
);
assign A = x + y;
endmodule
EOT
hierarchy -top top
proc
equiv_opt -run :prove -map +/nanoxplore/cells_sim.v -map +/nanoxplore/cells_sim_u.v synth_nanoxplore
opt -full
miter -equiv -flatten -make_assert -make_outputs gold gate miter
sat -verify -prove-asserts -seq 3 -set-init-zero -show-inputs -show-outputs miter
design -load postopt
cd top
stat
select -assert-count 48 t:NX_CY
select -assert-none t:NX_CY %% t:* %D