From 40f021e1367af8cc8cd2ea133ba4cb0d2f342cbd Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Sun, 15 Feb 2015 12:58:12 +0100
Subject: [PATCH] Added "check -noinit"
---
passes/cmds/check.cc | 22 +++++++++++++++++++---
1 file changed, 19 insertions(+), 3 deletions(-)
diff --git a/passes/cmds/check.cc b/passes/cmds/check.cc
index 6840572eb..824131a7a 100644
--- a/passes/cmds/check.cc
+++ b/passes/cmds/check.cc
@@ -31,7 +31,7 @@ struct CheckPass : public Pass {
{
// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
log("\n");
- log(" check [selection]\n");
+ log(" check [options] [selection]\n");
log("\n");
log("This pass identifies the following problems in the current design:\n");
log("\n");
@@ -41,15 +41,27 @@ struct CheckPass : public Pass {
log("\n");
log(" - used wires that do not have a driver\n");
log("\n");
+ log("When called with -noinit then this command also checks for wires which have\n");
+ log("the 'init' attribute set.\n");
+ log("\n");
}
virtual void execute(std::vector<std::string> args, RTLIL::Design *design)
{
int counter = 0;
+ bool noinit = false;
+
+ size_t argidx;
+ for (argidx = 1; argidx < args.size(); argidx++) {
+ if (args[argidx] == "-noinit") {
+ noinit = true;
+ continue;
+ }
+ break;
+ }
+ extra_args(args, argidx, design);
log_header("Executing CHECK pass (checking for obvious problems).\n");
- extra_args(args, 1, design);
-
for (auto module : design->selected_whole_modules_warn())
{
if (module->has_processes_warn())
@@ -93,6 +105,10 @@ struct CheckPass : public Pass {
if (wire->port_output)
for (auto bit : sigmap(wire))
if (bit.wire) used_wires.insert(bit);
+ if (noinit && wire->attributes.count("\\init")) {
+ log_warning("Wire %s.%s has an unprocessed 'init' attribute.\n", log_id(module), log_id(wire));
+ counter++;
+ }
}
for (auto it : wire_drivers)