mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-06-11 08:33:26 +00:00
Code Activity

Docs: Reflow line length

Browse source
This commit is contained in:
Krystine Sherwin 2024-05-03 13:38:01 +12:00
parent 829e02ec5b
commit 40ba92e956
No known key found for this signature in database
20 changed files with 782 additions and 785 deletions
Download patch file Download diff file Expand all files Collapse all files

219
docs/source/using_yosys/more_scripting/interactive_investigation.rst
View file

@ -13,9 +13,9 @@ A look at the show command
.. TODO:: merge into :doc:`/getting_started/scripting_intro` show section
This section explores the `show` command and explains the symbols used
in the circuit diagrams generated by it. The code used is included in the Yosys
code base under |code_examples/show|_.
This section explores the `show` command and explains the symbols used in the
circuit diagrams generated by it. The code used is included in the Yosys code
base under |code_examples/show|_.
.. |code_examples/show| replace:: :file:`docs/source/code_examples/show`
.. _code_examples/show: https://github.com/YosysHQ/yosys/tree/main/docs/source/code_examples/show
@ -32,11 +32,10 @@ will use to demonstrate the usage of `show` in a simple setting.
:name: example_v
The Yosys synthesis script we will be running is included as
:numref:`example_ys`. Note that `show` is called with the ``-pause``
option, that halts execution of the Yosys script until the user presses the
Enter key. Using :yoscrypt:`show -pause` also allows the user to enter an
interactive shell to further investigate the circuit before continuing
synthesis.
:numref:`example_ys`. Note that `show` is called with the ``-pause`` option,
that halts execution of the Yosys script until the user presses the Enter key.
Using :yoscrypt:`show -pause` also allows the user to enter an interactive shell
to further investigate the circuit before continuing synthesis.
.. literalinclude:: /code_examples/show/example_show.ys
:language: yoscrypt
@ -95,19 +94,19 @@ multiplexer and a d-type flip-flop, which brings us to the second diagram:
The Rhombus shape to the right is a dangling wire. (Wire nodes are only shown if
they are dangling or have "public" names, for example names assigned from the
Verilog input.) Also note that the design now contains two instances of a
``BUF``-node. These are artefacts left behind by the `proc` command. It
is quite usual to see such artefacts after calling commands that perform changes
in the design, as most commands only care about doing the transformation in the
least complicated way, not about cleaning up after them. The next call to
`clean` (or `opt`, which includes `clean` as one of
its operations) will clean up these artefacts. This operation is so common in
Yosys scripts that it can simply be abbreviated with the ``;;`` token, which
doubles as separator for commands. Unless one wants to specifically analyze this
artefacts left behind some operations, it is therefore recommended to always
call `clean` before calling `show`.
``BUF``-node. These are artefacts left behind by the `proc` command. It is quite
usual to see such artefacts after calling commands that perform changes in the
design, as most commands only care about doing the transformation in the least
complicated way, not about cleaning up after them. The next call to `clean` (or
`opt`, which includes `clean` as one of its operations) will clean up these
artefacts. This operation is so common in Yosys scripts that it can simply be
abbreviated with the ``;;`` token, which doubles as separator for commands.
Unless one wants to specifically analyze this artefacts left behind some
operations, it is therefore recommended to always call `clean` before calling
`show`.
In this script we directly call `opt` as the next step, which finally
leads us to the third diagram:
In this script we directly call `opt` as the next step, which finally leads us
to the third diagram:
.. figure:: /_images/code_examples/show/example_third.*
:class: width-helper invert-helper
@ -115,9 +114,9 @@ leads us to the third diagram:
Output of the third `show` command in :ref:`example_ys`
Here we see that the `opt` command not only has removed the artifacts
left behind by `proc`, but also determined correctly that it can remove
the first `$mux` cell without changing the behavior of the circuit.
Here we see that the `opt` command not only has removed the artifacts left
behind by `proc`, but also determined correctly that it can remove the first
`$mux` cell without changing the behavior of the circuit.
Break-out boxes for signal vectors
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
@ -188,8 +187,8 @@ individual bits, resulting in an unnecessary complex diagram.
:class: width-helper invert-helper
:name: second_pitfall
Effects of `splitnets` command and of providing a cell library on
design in :numref:`first_pitfall`
Effects of `splitnets` command and of providing a cell library on design in
:numref:`first_pitfall`
.. literalinclude:: /code_examples/show/cmos.ys
:language: yoscrypt
@ -201,8 +200,8 @@ individual bits, resulting in an unnecessary complex diagram.
For :numref:`second_pitfall`, Yosys has been given a description of the cell
library as Verilog file containing blackbox modules. There are two ways to load
cell descriptions into Yosys: First the Verilog file for the cell library can be
passed directly to the `show` command using the ``-lib <filename>``
option. Secondly it is possible to load cell libraries into the design with the
passed directly to the `show` command using the ``-lib <filename>`` option.
Secondly it is possible to load cell libraries into the design with the
:yoscrypt:`read_verilog -lib <filename>` command. The second method has the
great advantage that the library only needs to be loaded once and can then be
used in all subsequent calls to the `show` command.
@ -216,19 +215,19 @@ module ports. Per default the command only operates on interior signals.
Miscellaneous notes
^^^^^^^^^^^^^^^^^^^
Per default the `show` command outputs a temporary dot file and
launches ``xdot`` to display it. The options ``-format``, ``-viewer`` and
``-prefix`` can be used to change format, viewer and filename prefix. Note that
the ``pdf`` and ``ps`` format are the only formats that support plotting
multiple modules in one run. The ``dot`` format can be used to output multiple
modules, however ``xdot`` will raise an error when trying to read them.
Per default the `show` command outputs a temporary dot file and launches
``xdot`` to display it. The options ``-format``, ``-viewer`` and ``-prefix`` can
be used to change format, viewer and filename prefix. Note that the ``pdf`` and
``ps`` format are the only formats that support plotting multiple modules in one
run. The ``dot`` format can be used to output multiple modules, however
``xdot`` will raise an error when trying to read them.
In densely connected circuits it is sometimes hard to keep track of the
individual signal wires. For these cases it can be useful to call
`show` with the ``-colors <integer>`` argument, which randomly assigns
colors to the nets. The integer (> 0) is used as seed value for the random color
assignments. Sometimes it is necessary it try some values to find an assignment
of colors that looks good.
individual signal wires. For these cases it can be useful to call `show` with
the ``-colors <integer>`` argument, which randomly assigns colors to the nets.
The integer (> 0) is used as seed value for the random color assignments.
Sometimes it is necessary it try some values to find an assignment of colors
that looks good.
The command :yoscrypt:`help show` prints a complete listing of all options
supported by the `show` command.
@ -244,10 +243,10 @@ relevant portions of the circuit.
In addition to *what* to display one also needs to carefully decide *when* to
display it, with respect to the synthesis flow. In general it is a good idea to
troubleshoot a circuit in the earliest state in which a problem can be
reproduced. So if, for example, the internal state before calling the
`techmap` command already fails to verify, it is better to troubleshoot
the coarse-grain version of the circuit before `techmap` than the
gate-level circuit after `techmap`.
reproduced. So if, for example, the internal state before calling the `techmap`
command already fails to verify, it is better to troubleshoot the coarse-grain
version of the circuit before `techmap` than the gate-level circuit after
`techmap`.
.. Note::
@ -260,18 +259,17 @@ Interactive navigation
^^^^^^^^^^^^^^^^^^^^^^
Once the right state within the synthesis flow for debugging the circuit has
been identified, it is recommended to simply add the `shell` command to
the matching place in the synthesis script. This command will stop the synthesis
at the specified moment and go to shell mode, where the user can interactively
been identified, it is recommended to simply add the `shell` command to the
matching place in the synthesis script. This command will stop the synthesis at
the specified moment and go to shell mode, where the user can interactively
enter commands.
For most cases, the shell will start with the whole design selected (i.e. when
the synthesis script does not already narrow the selection). The command
`ls` can now be used to create a list of all modules. The command
`cd` can be used to switch to one of the modules (type ``cd ..`` to
switch back). Now the `ls` command lists the objects within that
module. This is demonstrated below using :file:`example.v` from `A simple
circuit`_:
the synthesis script does not already narrow the selection). The command `ls`
can now be used to create a list of all modules. The command `cd` can be used to
switch to one of the modules (type ``cd ..`` to switch back). Now the `ls`
command lists the objects within that module. This is demonstrated below using
:file:`example.v` from `A simple circuit`_:
.. literalinclude:: /code_examples/show/example.out
:language: doscon
@ -280,11 +278,10 @@ circuit`_:
:caption: Output of `ls` and `cd` after running :file:`yosys example.v`
:name: lscd
When a module is selected using the `cd` command, all commands (with a
few exceptions, such as the ``read_`` and ``write_`` commands) operate only on
the selected module. This can also be useful for synthesis scripts where
different synthesis strategies should be applied to different modules in the
design.
When a module is selected using the `cd` command, all commands (with a few
exceptions, such as the ``read_`` and ``write_`` commands) operate only on the
selected module. This can also be useful for synthesis scripts where different
synthesis strategies should be applied to different modules in the design.
We can see that the cell names from :numref:`example_out` are just abbreviations
of the actual cell names, namely the part after the last dollar-sign. Most
@ -292,15 +289,14 @@ auto-generated names (the ones starting with a dollar sign) are rather long and
contains some additional information on the origin of the named object. But in
most cases those names can simply be abbreviated using the last part.
Usually all interactive work is done with one module selected using the
`cd` command. But it is also possible to work from the design-context
(``cd ..``). In this case all object names must be prefixed with
``<module_name>/``. For example ``a*/b*`` would refer to all objects whose names
start with ``b`` from all modules whose names start with ``a``.
Usually all interactive work is done with one module selected using the `cd`
command. But it is also possible to work from the design-context (``cd ..``). In
this case all object names must be prefixed with ``<module_name>/``. For example
``a*/b*`` would refer to all objects whose names start with ``b`` from all
modules whose names start with ``a``.
The `dump` command can be used to print all information about an
object. For example, calling :yoscrypt:`dump $2` after the :yoscrypt:`cd
example` above:
The `dump` command can be used to print all information about an object. For
example, calling :yoscrypt:`dump $2` after the :yoscrypt:`cd example` above:
.. literalinclude:: /code_examples/show/example.out
:language: RTLIL
@ -323,11 +319,10 @@ tools).
- The selection mechanism, especially patterns such as ``%ci`` and ``%co``, can
be used to figure out how parts of the design are connected.
- Commands such as `submod`, `expose`, and `splice`
can be used to transform the design into an equivalent design that is easier
to analyse.
- Commands such as `eval` and `sat` can be used to investigate
the behavior of the circuit.
- Commands such as `submod`, `expose`, and `splice` can be used to transform the
design into an equivalent design that is easier to analyse.
- Commands such as `eval` and `sat` can be used to investigate the behavior of
the circuit.
- :doc:`/cmd/show`.
- :doc:`/cmd/dump`.
- :doc:`/cmd/add` and :doc:`/cmd/delete` can be used to modify and reorganize a
@ -342,9 +337,9 @@ The code used is included in the Yosys code base under
Changing design hierarchy
^^^^^^^^^^^^^^^^^^^^^^^^^
Commands such as `flatten` and `submod` can be used to change
the design hierarchy, i.e. flatten the hierarchy or moving parts of a module to
a submodule. This has applications in synthesis scripts as well as in reverse
Commands such as `flatten` and `submod` can be used to change the design
hierarchy, i.e. flatten the hierarchy or moving parts of a module to a
submodule. This has applications in synthesis scripts as well as in reverse
engineering and analysis. An example using `submod` is shown below for
reorganizing a module in Yosys and checking the resulting circuit.
@ -388,10 +383,10 @@ Analyzing the resulting circuit with :doc:`/cmd/eval`:
Behavioral changes
^^^^^^^^^^^^^^^^^^
Commands such as `techmap` can be used to make behavioral changes to
the design, for example changing asynchronous resets to synchronous resets. This
has applications in design space exploration (evaluation of various
architectures for one circuit).
Commands such as `techmap` can be used to make behavioral changes to the design,
for example changing asynchronous resets to synchronous resets. This has
applications in design space exploration (evaluation of various architectures
for one circuit).
The following techmap map file replaces all positive-edge async reset flip-flops
with positive-edge sync reset flip-flops. The code is taken from the example
@ -448,8 +443,8 @@ Recall the ``memdemo`` design from :ref:`advanced_logic_cones`:
Because this produces a rather large circuit, it can be useful to split it into
smaller parts for viewing and working with. :numref:`submod` does exactly that,
utilising the `submod` command to split the circuit into three
sections: ``outstage``, ``selstage``, and ``scramble``.
utilising the `submod` command to split the circuit into three sections:
``outstage``, ``selstage``, and ``scramble``.
.. literalinclude:: /code_examples/selections/submod.ys
:language: yoscrypt
@ -481,9 +476,9 @@ below.
Evaluation of combinatorial circuits
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
The `eval` command can be used to evaluate combinatorial circuits. As
an example, we will use the ``selstage`` subnet of ``memdemo`` which we found
above and is shown in :numref:`selstage`.
The `eval` command can be used to evaluate combinatorial circuits. As an
example, we will use the ``selstage`` subnet of ``memdemo`` which we found above
and is shown in :numref:`selstage`.
.. todo:: replace inline code
@ -526,21 +521,21 @@ The ``-table`` option can be used to create a truth table. For example:
Assumed undef (x) value for the following signals: \s2
Note that the `eval` command (as well as the `sat` command
discussed in the next sections) does only operate on flattened modules. It can
not analyze signals that are passed through design hierarchy levels. So the
`flatten` command must be used on modules that instantiate other
modules before these commands can be applied.
Note that the `eval` command (as well as the `sat` command discussed in the next
sections) does only operate on flattened modules. It can not analyze signals
that are passed through design hierarchy levels. So the `flatten` command must
be used on modules that instantiate other modules before these commands can be
applied.
Solving combinatorial SAT problems
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Often the opposite of the `eval` command is needed, i.e. the circuits
output is given and we want to find the matching input signals. For small
circuits with only a few input bits this can be accomplished by trying all
possible input combinations, as it is done by the ``eval -table`` command. For
larger circuits however, Yosys provides the `sat` command that uses a
`SAT`_ solver, `MiniSAT`_, to solve this kind of problems.
Often the opposite of the `eval` command is needed, i.e. the circuits output is
given and we want to find the matching input signals. For small circuits with
only a few input bits this can be accomplished by trying all possible input
combinations, as it is done by the ``eval -table`` command. For larger circuits
however, Yosys provides the `sat` command that uses a `SAT`_ solver, `MiniSAT`_,
to solve this kind of problems.
.. _SAT: http://en.wikipedia.org/wiki/Circuit_satisfiability
@ -551,9 +546,9 @@ larger circuits however, Yosys provides the `sat` command that uses a
While it is possible to perform model checking directly in Yosys, it
is highly recommended to use SBY or EQY for formal hardware verification.
The `sat` command works very similar to the `eval` command.
The main difference is that it is now also possible to set output values and
find the corresponding input values. For Example:
The `sat` command works very similar to the `eval` command. The main difference
is that it is now also possible to set output values and find the corresponding
input values. For Example:
.. todo:: replace inline code
@ -580,8 +575,8 @@ find the corresponding input values. For Example:
\s1 0 0 00
\s2 0 0 00
Note that the `sat` command supports signal names in both arguments to
the ``-set`` option. In the above example we used ``-set s1 s2`` to constraint
Note that the `sat` command supports signal names in both arguments to the
``-set`` option. In the above example we used ``-set s1 s2`` to constraint
``s1`` and ``s2`` to be equal. When more complex constraints are needed, a
wrapper circuit must be constructed that checks the constraints and signals if
the constraint was met using an extra output port, which then can be forced to a
@ -642,8 +637,8 @@ of course be to perform the test in 32 bits, for example by replacing ``p !=
a*b`` in the miter with ``p != {16'd0,a}b``, or by using a temporary variable
for the 32 bit product ``a*b``. But as 31 fits well into 8 bits (and as the
purpose of this document is to show off Yosys features) we can also simply force
the upper 8 bits of ``a`` and ``b`` to zero for the `sat` call, as is
done below.
the upper 8 bits of ``a`` and ``b`` to zero for the `sat` call, as is done
below.
.. todo:: replace inline code
@ -705,18 +700,18 @@ command:
sat -seq 6 -show y -show d -set-init-undef \
-max_undef -set-at 4 y 1 -set-at 5 y 2 -set-at 6 y 3
The ``-seq 6`` option instructs the `sat` command to solve a sequential
problem in 6 time steps. (Experiments with lower number of steps have show that
at least 3 cycles are necessary to bring the circuit in a state from which the
sequence 1, 2, 3 can be produced.)
The ``-seq 6`` option instructs the `sat` command to solve a sequential problem
in 6 time steps. (Experiments with lower number of steps have show that at least
3 cycles are necessary to bring the circuit in a state from which the sequence
1, 2, 3 can be produced.)
The ``-set-init-undef`` option tells the `sat` command to initialize
all registers to the undef (``x``) state. The way the ``x`` state is treated in
The ``-set-init-undef`` option tells the `sat` command to initialize all
registers to the undef (``x``) state. The way the ``x`` state is treated in
Verilog will ensure that the solution will work for any initial state.
The ``-max_undef`` option instructs the `sat` command to find a
solution with a maximum number of undefs. This way we can see clearly which
inputs bits are relevant to the solution.
The ``-max_undef`` option instructs the `sat` command to find a solution with a
maximum number of undefs. This way we can see clearly which inputs bits are
relevant to the solution.
Finally the three ``-set-at`` options add constraints for the ``y`` signal to
play the 1, 2, 3 sequence, starting with time step 4.
@ -807,7 +802,7 @@ is the only way of setting the ``s1`` and ``s2`` registers to a known value. The
input values for the other steps are a bit harder to work out manually, but the
SAT solver finds the correct solution in an instant.
There is much more to write about the `sat` command. For example, there
is a set of options that can be used to performs sequential proofs using
temporal induction :cite:p:`een2003temporal`. The command ``help sat`` can be
used to print a list of all options with short descriptions of their functions.
There is much more to write about the `sat` command. For example, there is a set
of options that can be used to performs sequential proofs using temporal
induction :cite:p:`een2003temporal`. The command ``help sat`` can be used to
print a list of all options with short descriptions of their functions.

3
docs/source/using_yosys/more_scripting/model_checking.rst
View file

@ -17,8 +17,7 @@ passes in Yosys.
Other applications include checking if a module conforms to interface standards.
The `sat` command in Yosys can be used to perform Symbolic Model
Checking.
The `sat` command in Yosys can be used to perform Symbolic Model Checking.
Checking techmap
~~~~~~~~~~~~~~~~

74
docs/source/using_yosys/more_scripting/selections.rst
View file

@ -9,31 +9,31 @@ The selection framework
.. todo:: reduce overlap with :doc:`/getting_started/scripting_intro` select section
The `select` command can be used to create a selection for subsequent
commands. For example:
The `select` command can be used to create a selection for subsequent commands.
For example:
.. code:: yoscrypt
select foobar # select the module foobar
delete # delete selected objects
Normally the `select` command overwrites a previous selection. The
commands :yoscrypt:`select -add` and :yoscrypt:`select -del` can be used to add
or remove objects from the current selection.
Normally the `select` command overwrites a previous selection. The commands
:yoscrypt:`select -add` and :yoscrypt:`select -del` can be used to add or remove
objects from the current selection.
The command :yoscrypt:`select -clear` can be used to reset the selection to the
default, which is a complete selection of everything in the current module.
This selection framework can also be used directly in many other commands.
Whenever a command has ``[selection]`` as last argument in its usage help, this
means that it will use the engine behind the `select` command to
evaluate additional arguments and use the resulting selection instead of the
selection created by the last `select` command.
means that it will use the engine behind the `select` command to evaluate
additional arguments and use the resulting selection instead of the selection
created by the last `select` command.
For example, the command `delete` will delete everything in the current
selection; while :yoscrypt:`delete foobar` will only delete the module foobar.
If no `select` command has been made, then the "current selection" will
be the whole design.
If no `select` command has been made, then the "current selection" will be the
whole design.
.. note:: Many of the examples on this page make use of the `show`
command to visually demonstrate the effect of selections. For a more
@ -59,8 +59,8 @@ Module and design context
^^^^^^^^^^^^^^^^^^^^^^^^^
Commands can be executed in *module/* or *design/* context. Until now, all
commands have been executed in design context. The `cd` command can be
used to switch to module context.
commands have been executed in design context. The `cd` command can be used to
switch to module context.
In module context, all commands only effect the active module. Objects in the
module are selected without the ``<module_name>/`` prefix. For example:
@ -91,7 +91,7 @@ Special patterns can be used to select by object property or type. For example:
a:foobar=42`
- select all modules with the attribute ``blabla`` set: :yoscrypt:`select
A:blabla`
- select all $add cells from the module foo: :yoscrypt:`select foo/t:$add`
- select all `$add` cells from the module foo: :yoscrypt:`select foo/t:$add`
A complete list of pattern expressions can be found in :doc:`/cmd/select`.
@ -101,12 +101,12 @@ Operations on selections
Combining selections
^^^^^^^^^^^^^^^^^^^^
The `select` command is actually much more powerful than it might seem
at first glance. When it is called with multiple arguments, each argument is
evaluated and pushed separately on a stack. After all arguments have been
processed it simply creates the union of all elements on the stack. So
:yoscrypt:`select t:$add a:foo` will select all `$add` cells and all objects
with the ``foo`` attribute set:
The `select` command is actually much more powerful than it might seem at first
glance. When it is called with multiple arguments, each argument is evaluated
and pushed separately on a stack. After all arguments have been processed it
simply creates the union of all elements on the stack. So :yoscrypt:`select
t:$add a:foo` will select all `$add` cells and all objects with the ``foo``
attribute set:
.. literalinclude:: /code_examples/selections/foobaraddsub.v
:caption: Test module for operations on selections
@ -220,11 +220,11 @@ The following sequence of diagrams demonstrates this step-wise expansion:
Output of :yoscrypt:`show prod %ci %ci %ci` on :numref:`sumprod`
Notice the subtle difference between :yoscrypt:`show prod %ci` and
:yoscrypt:`show prod %ci %ci`. Both images show the `$mul` cell driven by
some inputs ``$3_Y`` and ``c``. However it is not until the second image,
having called ``%ci`` the second time, that `show` is able to
distinguish between ``$3_Y`` being a wire and ``c`` being an input. We can see
this better with the `dump` command instead:
:yoscrypt:`show prod %ci %ci`. Both images show the `$mul` cell driven by some
inputs ``$3_Y`` and ``c``. However it is not until the second image, having
called ``%ci`` the second time, that `show` is able to distinguish between
``$3_Y`` being a wire and ``c`` being an input. We can see this better with the
`dump` command instead:
.. literalinclude:: /code_examples/selections/sumprod.out
:language: RTLIL
@ -241,8 +241,8 @@ be a bit dull. So there is a shortcut for that: the number of iterations can be
appended to the action. So for example the action ``%ci3`` is identical to
performing the ``%ci`` action three times.
The action ``%ci*`` performs the ``%ci`` action over and over again until it
has no effect anymore.
The action ``%ci*`` performs the ``%ci`` action over and over again until it has
no effect anymore.
.. _advanced_logic_cones:
@ -264,8 +264,8 @@ source repository.
:name: memdemo_src
:language: verilog
The script :file:`memdemo.ys` is used to generate the images included here. Let's
look at the first section:
The script :file:`memdemo.ys` is used to generate the images included here.
Let's look at the first section:
.. literalinclude:: /code_examples/selections/memdemo.ys
:caption: Synthesizing :ref:`memdemo_src`
@ -276,8 +276,8 @@ look at the first section:
This loads :numref:`memdemo_src` and synthesizes the included module. Note that
this code can be copied and run directly in a Yosys command line session,
provided :file:`memdemo.v` is in the same directory. We can now change to the
``memdemo`` module with ``cd memdemo``, and call `show` to see the
diagram in :numref:`memdemo_00`.
``memdemo`` module with ``cd memdemo``, and call `show` to see the diagram in
:numref:`memdemo_00`.
.. figure:: /_images/code_examples/selections/memdemo_00.*
:class: width-helper invert-helper
@ -371,8 +371,8 @@ selection instead of overwriting it.
select -del reg_42 # but not this one
select -add state %ci # and add more stuff
Within a select expression the token ``%`` can be used to push the previous selection
on the stack.
Within a select expression the token ``%`` can be used to push the previous
selection on the stack.
.. code:: yoscrypt
@ -387,16 +387,16 @@ Storing and recalling selections
The current selection can be stored in memory with the command ``select -set
<name>``. It can later be recalled using ``select @<name>``. In fact, the
``@<name>`` expression pushes the stored selection on the stack maintained by
the `select` command. So for example :yoscrypt:`select @foo @bar %i`
will select the intersection between the stored selections ``foo`` and ``bar``.
the `select` command. So for example :yoscrypt:`select @foo @bar %i` will select
the intersection between the stored selections ``foo`` and ``bar``.
In larger investigation efforts it is highly recommended to maintain a script
that sets up relevant selections, so they can easily be recalled, for example
when Yosys needs to be re-run after a design or source code change.
The `history` command can be used to list all recent interactive
commands. This feature can be useful for creating such a script from the
commands used in an interactive session.
The `history` command can be used to list all recent interactive commands. This
feature can be useful for creating such a script from the commands used in an
interactive session.
Remember that select expressions can also be used directly as arguments to most
commands. Some commands also accept a single select argument to some options. In